AD2S83IP-REEL Analog Devices Inc, AD2S83IP-REEL Datasheet - Page 3

IC R/D CONV TRACKING 44PLCC T/R

AD2S83IP-REEL

Manufacturer Part Number
AD2S83IP-REEL
Description
IC R/D CONV TRACKING 44PLCC T/R
Manufacturer
Analog Devices Inc
Type
R/D Converterr
Datasheet

Specifications of AD2S83IP-REEL

Rohs Status
RoHS non-compliant
Input Type
Parallel
Output Type
Digital
Interface
Parallel
Current - Supply
30mA
Mounting Type
Surface Mount
Package / Case
44-PLCC
Parameter
COMPLEMENT
DATA LOAD
BUSY
DIRECTION
RIPPLE CLOCK
DIGITAL INPUTS
DIGITAL INPUTS
DIGITAL INPUTS
DIGITAL OUTPUTS
NOTES
1
2
3
4
5
6
7
All min and max specifications are guaranteed. Specifications in boldface are tested on all production units at final electrical test.
Specifications subject to change without notice.
Angular accuracy is not guaranteed <50 Hz reference frequency.
Linearity derates from 500 kHz–1000 kHz @ 0.0017%/kHz.
Refer to Definition of Linearity, “The AD2S83 as a Silicon Tachogenerator.”
Worst case reversion error at temperature extremes.
Velocity output offset dependent on value for R6.
Refer to timing diagram.
Busy pulse guaranteed up to a VCO rate of 900 kHz.
Sense
Sense
Width
Load
Sense
Max Load
Sense
Width
Reset
Load
Input High Voltage, V
Input Low Voltage, V
Input High Current, I
Input Low Current, I
Low Voltage, V
Low Current, I
High Voltage, V
Low Voltage, V
6, 7
6
IL
6
IL
OL
OH
IL
IL
IH
IH
Conditions
Internally Pulled High via 100 kΩ
to +V
No Connect for Normal Operation
Internally Pulled High via 100 kΩ
to +V
Data to be Loaded into the
Counters from the Data Lines
Logic HI When Position O/P Changing
Use Additional Pull-Up (See Figure 2)
Logic HI Counting Up
Logic LO Counting Down
Logic HI
All 1s to All 0s
All 0s to All 1s
Dependent on Input Velocity
Before Next Busy
INHIBIT, ENABLE
DB1–DB16, Byte Select
± V
INHIBIT, ENABLE
DB1–DB16, Byte Select
± V
INHIBIT, ENABLE
DB1–DB16
± V
INHIBIT, ENABLE
DB1–DB16, Byte Select
± V
ENABLE = HI
SC1, SC2, DATA LOAD
± V
ENABLE = HI
SC1, SC2, DATA LOAD
± V
DB1–DB16
RIPPLE CLK, DIR
± V
I
DB1–DB16
RIPPLE CLK, DIR
± V
I
OH
OL
S
S
S
S
S
S
S
S
= 1.2 mA
= 100 µA
= ± 11.4 V, V
= ± 12.6 V, V
= ± 12.6 V, V
= ± 12.6 V, V
= ± 12.0 V, V
= ± 12.0 V, V
= ± 12.0 V, V
= ± 12.0 V, V
S
S
. Logic LO to Activate;
. Logic LO Allows
L
L
L
L
L
L
L
L
= 5.0 V
= 5.0 V
= 5.5 V
= 5.5 V
= 5.0 V
= 5.0 V
= 4.5 V
= 5.5 V
Min
150
300
2.0
2.4
Typ
150
Max
300
350
1
3
3
0.8
1.0
–400
0.4
100
100
AD2S83
Unit
ns
ns
LSTTL
LSTTL
ns
LSTTL
V
V
µA
µA
V
µA
V
V

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