FIN12ACMLX Fairchild Semiconductor, FIN12ACMLX Datasheet - Page 9

IC SERIALIZER/DESERIALIZER 32MLP

FIN12ACMLX

Manufacturer Part Number
FIN12ACMLX
Description
IC SERIALIZER/DESERIALIZER 32MLP
Manufacturer
Fairchild Semiconductor
Series
SerDes™r
Datasheet

Specifications of FIN12ACMLX

Function
Serializer/Deserializer
Data Rate
560Mbps
Input Type
LVCMOS
Output Type
LVCMOS
Number Of Inputs
12
Number Of Outputs
12
Voltage - Supply
1.65 V ~ 3.6 V
Operating Temperature
-30°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-MLP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
FIN12ACMLX
FIN12ACMLXTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FIN12ACMLX
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
Part Number:
FIN12ACMLX.
Manufacturer:
FAI
Quantity:
20 000
FIN12AC Rev. 1.1.2
© 2006 Fairchild Semiconductor Corporation
STROBE Pass-Through Mode
For some applications, it is desirable to pass a word
clock across a differential signal pair in the opposite
direction of serialization. The FIN12AC supports this
mode of operation.
For the deserializer:
1. DIRI = LOW
2. CKREF = LOW
3. Word clock should be connected to the STROBE.
This passes the STROBE signal out the CKSO port.
Table 2. Control I/O
Flex Circuit Design Guidelines
The serial I/O information is transmitted at a high serial rate. Care must be taken implementing this serial I/O flex cable.
The following best practices should be used when developing the flex cabling or Flex PCB:
Mode Number
Keep all four differential wires the same length.
Allow no noisy signals over or near differential serial wires. Example: No LVCMOS traces over differential wires.
Use only one ground plane or wire over the differential serial wires. Do not run ground over top and bottom.
Do not place test points on differential serial wires.
Use differential serial wires a minimum of 2cm away from the antenna.
1, 2, 3
1, 2, 3
0
DIRI
x
0
1
DIRO
Z
1
0
CKSO = STROBE
Output Bit Clock
Serializer
CKSO
Z
Output STROBE
9
Deserializer
For the serializer:
1. Connect CKSO of the deserializer to CKSI of the
2. CKSI passes the signal to CKP.
When PLL-bypass mode is used, the bit clock toggles on
the CKP signal.
CKP
CKSI
serializer.
Z
Power Down Mode: S2 = 0, S1 = 0
Deserializer: Any active mode
Serializer: Any active mode
Mode of Operation
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