FW82810 Q862 Intel, FW82810 Q862 Datasheet

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FW82810 Q862

Manufacturer Part Number
FW82810 Q862
Description
Manufacturer
Intel
Datasheet

Specifications of FW82810 Q862

Lead Free Status / Rohs Status
Not Compliant
R
Intel
82810/82810-DC100 Graphics and
Memory Controller Hub (GMCH)
Specification Update
January 2001
Notice: The Intel® 82810/82810-DC100 GMCH may contain design defects or errors
known as errata which may cause the product to deviate from published specifications.
Current characterized errata are documented in this Specification Update.
®
810 Chipset Family:
Document Number:
290659-003

Related parts for FW82810 Q862

FW82810 Q862 Summary of contents

Page 1

... Graphics and Memory Controller Hub (GMCH) Specification Update January 2001 Notice: The Intel® 82810/82810-DC100 GMCH may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are documented in this Specification Update. Document Number: ...

Page 2

... No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right ...

Page 3

... R Contents Revision History................................................................................................................... 4 Preface ................................................................................................................................ 5 Specification Changes......................................................................................................... 9 Errata................................................................................................................................. 11 Specification Clarifications ................................................................................................ 17 Documentation Change..................................................................................................... 21 Specification Update ® Intel 82810 GMCH 3 ...

Page 4

... Intel 82810 GMCH Revision History Rev. -001 Initial Release -002 Added Specification Chages 1-7; Added Errata 1-16; Added Specification Clarifications 1-2, and Added Document Changes 1-4 -003 Added Errata #17; Added Specification Clarification #3 4 Draft/Changes R Date April 1999 November 1999 January 2001 ...

Page 5

... Specification Changes are modifications to the current published specifications. These changes will be incorporated in the next release of the specifications. Errata are design defects or errors. Errata may cause the Intel deviate from published specifications. Hardware and software designed to be used with any given stepping must assume that all errata documented for that stepping are present on all devices. ...

Page 6

... The Revision Number corresponds to bits 7-0 of the Revision ID Register located at offset 08h in the PCI function 0 configuration space. Component Marking Information ® The Intel 82810/82810-DC100 GMCH may be identified by the following component markings: Stepping S-Spec A2 SL35K ...

Page 7

... The following table indicates the Specification Changes, Errata, Specification Clarifications or Documentation Changes which apply to the listed Intel Intel intends to fix some of the errata in a future stepping of the component and to account for the other outstanding issues through documentation or Specification Changes as noted. This table uses ...

Page 8

... Changed: GMCH Graphics Controller Register Memory Added: Video Overlay Support Added: Resume from S3 DOCUMENTATION CHANGES  Changed: Intel Dynamic Video Memory Technology, Section 4.4 Changed: Digital Video Output Signal/TV-Out Pins, Section 2.6; {CLKOUT[1:0]} Changed: System Buffer Strength Control Register, Section 3.4.21; BUFF_SC 92h-93h Device 0 Register Description Changed: Chapter 2, Signal Description ...

Page 9

... Under Processor/Host Bus Support should read: -Optimized for Intel Pentium II, Pentium III and Intel Celeron processors. Host Interface, Section 1.3 First sentence should read: The host interface of the GMCH is optimized to support the Intel Pentium II, Pentium III and Intel Celeron processors. Specification Update ® ...

Page 10

... GB of addressable memory space and 64 KB+3 of addressable I/O space. (The P6 bus I/O addressability 3). Host Interface, Section 4.2 The first sentence should read: The host interface of the GMCH is optimized to support the Intel Pentium II, Pentium III and Intel Celeron processors. 7. Changed: 2D Graphics Refresh Rate ...

Page 11

... Implication: If the Conditions stated above are met the GMCH will display incorrect data on the screen resulting in some lines of color on the screen. Workaround: Do not run overlay in 4:2:0 or 4:1:0 modes when the surface is in linear memory and either horizontal or vertical mirroring is turned on. Status: No Stepping Fix Specification Update ® Intel 82810 GMCH Description 11 ...

Page 12

... Intel 82810 GMCH Blit Data Corruption 3. Problem: During a blit, the last QWord of data on a scan line will substitute the second to last QWord of data when clipping is enabled. This condition takes place when the last QWord of data is not full of pixel data. Implication: Some of the scan lines will have the last pixels, based on the color depth, corrupted. For 24bpp the last 2 pixels can be corrupted, for 16bpp the last 3 pixels can be corrupted and for 8bpp up to the last 7 pixels can be corrupted ...

Page 13

... Problem: A2 stepping of the Intel aligned data on Intel memory mapped I/O, and PCI space. No impact on cycles to memory and write combined AGP space. Implication: Results in data corruption that may lead to a system hang. No Intel ® on Intel 810 chipset platforms. Workaround: None Status: Intended to be fixed in the A3 stepping. See Summary Table of Changes for affected product(s) and steppings ...

Page 14

... Implication: The result could be a hang of the parser state machine or incorrect setting of the state variable in 3D. The only known application that uses the interrupt priority ring is the stretch-blit operation. Intel drivers associated with the 82810 do not use this process. This process is used by DVD software. ...

Page 15

... Win2K (32 applications). Validation activity included the use of automated and manual testing of over 400 applications, stress test software, and benchmark software. Due to the specific sequencing of events necessary to create the failure, Intel and major OEMs were unable to recreate the problem during any testing described above. ...

Page 16

... Implication: This is a violation of the PM 1.1 specification and causes the WHQL PC99A HCT9.x test to fail. Workaround: None Status: This issue will not be fixed in the 82810 GMCH. Intel is working with Microsoft WHQL waiver for WHQL certification. Asynchronous Screen Flip 17. ...

Page 17

... Test & Diagnostic Registers 04000h 03FFFh Local Memory Interface Control Registers 03000h 02FFFh - Instruction Control Regs. - Fence Table Registers - Interrupt Control 01000h 00FFFh VGA and Ext. VGA Registers 00000h ® Intel 82810 GMCH 31 19 MMADR Register (Base Address) reginstm.vsd 17 ...

Page 18

... Intel 82810 GMCH Added: Video Overlay Support 2. Reference Errata #11, Video Overlay Bandwidth Errata, in this document. In addition to Errata #11, the following clarification concerning video overlay support is provided: Reference Section 4.6.11, Display, the following information is added: Hardware bandwidth limitations define resolution when using video overlay. These limitations are established in the table below ...

Page 19

... The standard VGA mode only needs to disable the screen refresh since it doesn't start any other graphics traffic. Standard VGA drivers normally ensure this prior to entering S3 by setting the SR01 (I/O and memory offset address 3C5h (Index = 01h)), bit Specification Update ® Intel 82810 GMCH 19 ...

Page 20

... Intel 82810 GMCH 20 This page is intentionally left blank. R Specification Update ...

Page 21

... Section 4.4, Intel Dynamic Video Memory Technology, the first paragraph should read as follows. “The internal graphics device on both the 82810 and 82810-DC100 support Intel Memory Technology (D.V.M.T.). D.V.M.T. dynamically responds to application requirements by allocating the proper amount of display and texturing memory. ...

Page 22

... Intel 82810 GMCH 22 This page is intentionally left blank. R Specification Update ...

Page 23

... R Specification Update This page is intentionally left blank. ® Intel 82810 GMCH 23 ...

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