FW82810 Q862 Intel, FW82810 Q862 Datasheet - Page 13

• Manufacturer Part Number: FW82810 Q862
• Manufacturer: Intel

Specifications of FW82810 Q862

• Lead Free Status / Rohs Status: Not Compliant

6.
Problem:
Implication: Results in data corruption that may lead to a system hang. No Intel
Workaround: None
Status:
7.
Problem:
Implication: This problem does not affect the normal operation of Intel
Workaround: Set the IOQ depth to four for normal operation. Do not set the IOQ depth to one, except for
Status:
8.
Problem:
Implication: In this case a pixel may be shaded incorrectly on the edge of a texture.
Workaround: None.
Status:
Specification Update
R
Zero Length Partial Transaction
A2 stepping of the Intel
aligned data on Intel
memory mapped I/O, and PCI space. No impact on cycles to memory and write combined AGP
space.
on Intel
Intended to be fixed in the A3 stepping. See Summary Table of Changes for affected product(s)
and steppings.
HAB[7] Driven
When the IOQ depth is set to one, a test mode, HAB[7] is driven to Vil until ADS# asserts on
reset. When operating correctly the GMCH should float HAB[7] after two clock cycles following
the deassertion of RESET#.
IOQ depth at four. No contention on the host address bus results from this issue.
validation purposes.
No planned fix.
3D Texture Color/Chroma Key
A case exists where invalid data from the texture cache is included into the bilinear filter to
determine the texture color for a pixel causing the shading for that pixel to be incorrect. This
occurs when an indexed texture map has color or chroma key enabled and the filtering appears on a
texture boundary. In this case one valid textel is keyed on and the other is keyed out. In this case
the bilinear filtering uses two invalid textels in the cache that are past the texture boundary. If the
valid textel that is keyed out lines up with an invalid texel that is keyed on, the valid texel, which is
keyed out, is incorrectly replaced with the invalid textel before the bilinear filtering.
No planned fix.
®
810 chipset platforms.
®
Pentium
®
810 chipset does not support the MASKMOVQ instruction with non-
®
III Processors. Impacts cycles to non-write combined AGP,
®
810 chipset platforms, which sets the
®
Pentium
®
Intel
III Processor support
®
82810 GMCH
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