FW82810 Q862 Intel, FW82810 Q862 Datasheet - Page 11

• Manufacturer Part Number: FW82810 Q862
• Manufacturer: Intel

Specifications of FW82810 Q862

• Lead Free Status / Rohs Status: Not Compliant

Errata
1.
Problem:
Implication: BIOS must set the correct bits for the chip select buffer strengths. Buffer strengths work correctly
Workaround: BIOS must set the correct bits as stated above for the chip select buffer strengths.
Status:
2.
Problem:
Implication: If the Conditions stated above are met the GMCH will display incorrect data on the screen
Workaround: Do not run overlay in 4:2:0 or 4:1:0 modes when the surface is in linear memory and either
Status:
Specification Update
R
CS Buffer Strength Bit
The GMCH chip select buffer strength bits in the GMCH BUFF_SC register (Device 0, offset 92-
93h) bits 15:12 are as follows:
otherwise.
BIOS workaround. No stepping Fix
Overlay TLB
The GMCH does not correctly determine when it is valid to throw away the old translations in the
TBL and replace them with a new set of translations when the following conditions are met:
-Overlay is operating in 4:2:0 or 4:1:0 modes
-The overlay surface is read from linear memory
-An aligned 8 KB boundary falls in the middle of a scanline
-Either X-mirroring or Y-mirroring is activated
resulting in some lines of color on the screen.
horizontal or vertical mirroring is turned on.
No Stepping Fix
Bit
15
14
13
12
SCS[0]# Buffer Strength. This field sets the buffer strength for the SCS[0] buffer.
0 = 3x
1 = 2x
SCS[1]# Buffer Strength. This field sets the buffer strength for the SCS[1] buffer.
0 = 3x
1 = 2x
SCS[2]# Buffer Strength. This field sets the buffer strength for the SCS[2] buffer.
0 = 3x
1 = 2x
SCS[3]# Buffer Strength. This field sets the buffer strength for the SCS[3] buffer.
0 = 3x
1 = 2x
Description
Intel
®
82810 GMCH
11