PXB4220E-V33 Infineon Technologies, PXB4220E-V33 Datasheet - Page 38

• Manufacturer Part Number: PXB4220E-V33
• Description: IC CHIPSET 8 E1/T1 LINE 256-BGA
• Manufacturer: Infineon Technologies

Specifications of PXB4220E-V33

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 256-BGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: PXB4220E-V33; PXB4220E-V33IN

3.3
Table 11
Block
FR
OR
OQ
CR
UR
Data Sheet
Functional Block Description
Functions
Framer Receive interfaces
• FRCLK synchronization
• 8 bit serial to parallel conversion
• Frame and multiframe synchronization
• Timeslot counter
• Timeslot assignment and channel configuration (RAM1)
Octet Receive processing
ATM ports:
• Cell delineation
• HEC check: Header error detection and correction
• Cell payload de scrambling
• Idle or Unassigned Cell Deletion
• Statistics counter event generation
• Write to ATM Receive Buffer
AAL ports:
• Segmentation port de correlation
• Segmentation
• SN/SNP generation
• SDT pointer generation
• RTS value insertion
• Statistics counter event generation
• Write to Segmentation Buffer
Output Queue
• FIFO containing 256 addresses of cells to be sent to UTOPIA Receive
Cell Receive processing
ATM ports:
• Read cells from ATM receive buffer
AAL ports:
• Read cells from AAL segmentation buffer
• Padding of partially filled cells
UTOPIA Receive interface
• Cell level handshake
• Mapping of framer port number into ATM header in UTOPIA level 1
• Output buffer for 4 cells
Functions of IWE8 Blocks
mode and UTOPIA level 2 single PHY mode
38
PXB 4219E, PXB 4220E, PXB 4221E
Functional Description
IWE8, V3.4
2003-01-20