LTC4305IGN Linear Technology, LTC4305IGN Datasheet - Page 4

• Manufacturer Part Number: LTC4305IGN
• Description: IC BUFFER BUS 2WR ADDRESS 16SSOP
• Manufacturer: Linear Technology

Specifications of LTC4305IGN

• Applications: Multiplexer with Amplifier
• Interface: SMBus (2-Wire/I²C)
• Voltage - Supply: 2.2 V ~ 5.5 V
• Package / Case: 16-SSOP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

LTC4305
range, otherwise specifications are at T
4
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Guaranteed by design and not subject to test, unless stated
otherwise in the Conditions.
Note 3: The boosted pull-up currents are regulated to prevent excessively
fast edges for light loads. See the Typical Performance Characteristics for
rise time as a function of V
I
ELECTRICAL CHARACTERISTICS
SYMBOL
I
V
V
I
I
I
V
V
I
C
V
I
f
t
t
t
t
t
t
t
t
t
BOOST
2
ADR(IN, L)
ADR(IN, H)
ADR,FLOAT
SDAIN,SCLIN(OH)
2
SCL
BUF
HD, STA
SU, STA
SU, STO
HD, DATI
HD, DATO
SU, DAT
f
SP
ADR(H)
ADR(L)
SDAIN,SCLIN(TH)
SDAIN,SCLIN(HY)
IN
SDAIN(OL)
C Interface
C Interface Timing
as a function of V
PARAMETER
ADR0–2 Input High Voltage
ADR0–2 Input Low Voltage
ADR0–2 Logic Low Input Current
ADR0–2 Logic High Input Current
ADR0–2 Allowed Input Current
SDAIN, SCLIN Input Falling Threshold Voltages
SDAIN, SCLIN Hysteresis
SDAIN, SCLIN Input Current
SDA, SCL Input Capacitance
SDAIN Output Low Voltage
Maximum SCL Clock Frequency
Bus Free Time Between Stop/Start Condition
Hold Time After (Repeated) Start Condition
Repeated Start Condition Set-Up Time
Stop Condition Set-Up Time
Data Hold Time Input
Data Hold Time Output
Data Set-Up Time
SCL, SDA Fall Times
Pulse Width of Spikes Suppressed by the
Input Filter
CC
CC
and temperature.
and parasitic bus capacitance C
A
= 25°C. V
CC
BUS
= 3.3V unless otherwise noted.
and for
The
CONDITIONS
ADR0–2 = 0V, V
ADR0–2 = V
V
V
SCL, SDA = V
(Note 2)
I
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
●
SDA
CC
CC
denotes specifications which apply over the full specified temperature
= 2.7V, 5.5V (Note 5)
= 5.5V
= 4mA, V
Note 4: When a logic low voltage V
upstream-downstream buffers, the voltage on the other side is regulated
to a voltage V
is the offset voltage when the LTC4305 is driving the upstream pin (e.g.,
SDAIN) and V
driving the downstream pin (e.g., SDA1). See the Typical Performance
Characteristics for V
bus pull-up current.
Note 5: When floating, the ADR0–ADR2 pins can tolerate pin leakage
currents up to I
CC
CC
CC
= 5.5V
CC
= 2.7V
= 5.5V
LOW2
OS,DOWN-BUF
ADR,FLOAT
= V
OS,UP-BUF
LOW
and still convert the address correctly.
is the offset voltage when the LTC4305 is
+ V
●
●
●
●
●
●
●
●
and V
OS
is a positive offset voltage. V
20 + 0.1 •
LOW
0.1 • V
OS,DOWN-BUF
C
MIN
–30
400
300
1.4
30
±5
50
BUS
is forced on one side of the
CC
0.25 • V
0.75 • V
0.75
TYP
–60
±13
–30
–30
–25
600
150
as a function of V
1.6
0.2
60
30
45
50
6
CC
CC
0.9 • V
MAX
–80
100
900
100
300
250
1.8
0.4
1.3
± 5
80
10
0
0
0
OS,DOWN-BUF
CC
CC
UNITS
and
4305f
kHz
mV
µA
µA
µA
µA
pF
µs
ns
ns
ns
ns
ns
ns
ns
ns
V
V
V
V