LTC4305IGN Linear Technology, LTC4305IGN Datasheet - Page 6

• Manufacturer Part Number: LTC4305IGN
• Description: IC BUFFER BUS 2WR ADDRESS 16SSOP
• Manufacturer: Linear Technology

Specifications of LTC4305IGN

• Applications: Multiplexer with Amplifier
• Interface: SMBus (2-Wire/I²C)
• Voltage - Supply: 2.2 V ~ 5.5 V
• Package / Case: 16-SSOP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

LTC4305
PI FU CTIO S
6
ALERT1–ALERT2 (Pins 14, 1): Fault Alert Inputs,
Channels 1–2. Devices on each of the two output channels
can pull their respective pin low to indicate that a fault has
occurred. The LTC4305 then pulls the ALERT low to pass
the fault indication on to the host. See the “Operation”
section below for the details of how ALERT is set and
cleared. Connect unused fault alert inputs to V
ALERT (Pin 2): Fault Alert Output. An open-drain output
that is pulled low when a fault occurs to alert the host
controller. The LTC4305 pulls ALERT low when any of the
ALERT1–ALERT2 pins is low; when the two-wire bus is
stuck low; or when the Connection Requirement bit of
register 2 is low and a master tries to connect to a
downstream channel that is low. See the “Operation”
section below for the details of how ALERT is set and
cleared. The LTC4305 is compatible with the SMBus Alert
Response Address protocol. Connect a 10k resistor to a
power supply voltage to provide the pull-up. Tie to ground
if unused.
SDAIN (Pin 3): Serial Bus Data Input and Output. Connect
this pin to the SDA line on the master side. An external
pull-up resistor or current source is required.
GND (Pin 4): Device Ground.
SCLIN (Pin 5): Serial Bus Clock Input. Connect this pin to
the SCL line on the master side. An external pull-up
resistor or current source is required.
ENABLE (Pin 6): Digital Interface Enable and Register
Reset. Driving ENABLE high enables I
to the LTC4305. Driving ENABLE low disables I
munication to the LTC4305 and resets the registers to
their default state as shown in the Operations section.
When ENABLE returns high, masters can read and write
the LTC4305 again. If unused, tie ENABLE to V
U
U
U
2
C communication
CC
CC
2
C com-
.
.
V
capacitor of at least 0.01µF directly between V
for best results.
ADR0–ADR2 (Pins 8–10): Three-State Serial Bus
Address Inputs. Each pin may be floated, tied to ground,
or tied to V
See Table 1 in Applications Information section. When the
pins are floated, they can tolerate ±5µA of leakage current
and still convert the address correctly.
READY (Pin 11): Connection Ready Digital Output. An
N-channel MOSFET open-drain output transistor that pulls
down when none of the downstream channels is con-
nected to the upstream bus and turns off when one or
more downstream channels is connected to the upstream
bus. Connect a 10k resistor to a power supply voltage to
provide the pull-up. Tie to ground if unused.
SCL1–SCL2 (Pins 12, 16): Serial Bus Clock Outputs
Channels 1–2. Connect pins SCL1–SCL2 to the SCL lines
on the downstream channels 1–2, respectively. It is ac-
ceptable to float any pin that will never be connected to the
upstream bus. Otherwise, an external pull-up resistor or
current source is required on each pin.
SDA1–SDA2 (Pins 13, 15): Serial Bus Data Output
Channels 1–2. Connect pins SDA1–SDA2 to the SDA lines on
downstream channels 1–2, respectively. It is acceptable
to float any pin that will never be connected to the
upstream bus. Otherwise, an external pull-up resistor or
current source is required on each pin.
Exposed Pad (Pin 17, DHD Package Only): Exposed pad
may be left open or connected to device ground.
CC
(Pin 7): Power Supply Voltage. Connect a bypass
CC
. There are therefore 27 possible addresses.
CC
and GND
4305f