MCZ33989EGR2 Freescale Semiconductor, MCZ33989EGR2 Datasheet - Page 49

IC SYSTEM BASIS CHIP CAN 28-SOIC

MCZ33989EGR2

Manufacturer Part Number
MCZ33989EGR2
Description
IC SYSTEM BASIS CHIP CAN 28-SOIC
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MCZ33989EGR2

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
28-SOIC (7.5mm Width)
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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CAN LOW POWER MODE AND WAKE UP
Low Power Mode
VSUP pin. The voltage at V2 pin can be either at 5 V or turned
off. The current sourced from V2, when the CAN is in sleep
mode, is extremely low. In most case the V2 voltage is off,
however the CAN can be set into sleep mode even with 5 V
applied on V2.
Wake-Up
enabled, the CAN bus traffic is detected. The wake-up option
has to be enabled prior to setting the CAN in sleep mode. The
CAN bus wake-up is a pattern wake-up.
bus traffic will not be detected by the MC33989.
CAN Wake-Up Report: From the SBC in Sleep or Stop
Mode
power mode. If the MC33989 is set into sleep mode (V1 and
V2 off), the CAN wake-up or any wake-up is reported to the
MCU by the V1 turn on, leading to MCU supply turn on and
reset release.
wake-up or any wake-up is reported by a pulse on the INT
output.
CAN Wake-Up Report: From the SBC in Normal or
Standby Mode
interface is in sleep mode with wake-up enabled, the CAN
Analog Integrated Circuit Device Data
Freescale Semiconductor
In low power mode the CAN is internally supplied from the
When the CAN interface is in sleep mode with wake up
If the CAN is set into sleep mode with “wake-up disabled”,
The CAN wake-up reports depend upon the MC33989 low
If the SBC is in stop mode (V2 of and V1 active), the CAN
If the SBC is in normal or standby mode, and the CAN
2.5V
CANH
TX
CANL
RX
CANH-DOM
CANL-DOM
CAN in Normal mode
CANL/CANH-REC
Figure 39. Low Power Mode
disabled, and the receiver is also disabled. CANH and CANL
have a typical 50 k ohm impedance to gnd. The wake-up
receiver can be activated if wake-up is enable by an SPI
command.
command, CANH and CANL are set back into the recessive
level. This is illustrated in
CAN in Sleep mode
(wake-up enable or disable)
wake-up will be reported by the bit CANWU in the CAN
register.
normal mode and CAN sleep mode with wake up enable, it is
recommended to check for the CAN WU bit prior to setting
the MC33989 is sleep or stop mode, in case bus traffic has
occurred while the CAN interface was in sleep mode.
CAN Wake-Up Report in the SPI Registers
CAN-WU reports a CAN wake-up event while the SBC was in
sleep, stop, normal or standby mode. This bit is set until the
CAN is set by the SPI command in normal mode and CAN
register read.
Pattern Wake-Up
criteria must be fulfilled:
In low power mode the CANH and CANL driver are
When the device is set back into TX RX mode by an SPI
In case the SBC uses such configuration, the SBC in
After a CAN wake-up, a flag is set in the CAN register. Bit
In order to wake-up the CAN interface, the following
• The CAN interface wake-up receiver must receive a
• The distance between 2 pulses must be lower than
GND
series of 3 consecutive valid dominant pulses, each of
them has to be longer than 500 ns and shorter than
500 µs.
500 µs and the three pulse must occur within a time
frame of 1 ms.
SUPPLEMENTAL APPLICATION NOTES
Figure
(controlled by SPI command)
CAN in TX RX mode
39.
TYPICAL APPLICATIONS
33989
49

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