PEB22504HT-V11 Infineon Technologies, PEB22504HT-V11 Datasheet - Page 25

• Manufacturer Part Number: PEB22504HT-V11
• Description: IC INTERFACE QUAD 100-TQFP
• Manufacturer: Infineon Technologies

Specifications of PEB22504HT-V11

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 100-LFQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB22504HT-V11; PEB22504HT-V11IN

Table 2
Pin No.
88, 85, 82, 79 XDIP(1:4)
87, 84, 81, 78 XDIN(1:4)
30, 36, 43, 49 RCLK(1:4)
Data Sheet
Signal Pin Functions (cont’d)
Signal
SCLKO
(1:4)
Input (I)
Output (O)
Supply (S)
I + PU
I + PU
O
O
25
Function
Transmit Data In Positive
Transmit data received from the framer
interface is output on XL1/2. NRZ data has
to be provided on XDIP. Latching of data is
done with the rising or falling transitions of
TCLK according to LIM4.TPE.
Transmit Data In Negative
If the dual-rail data stream is selected by
bits LIM0.XC(1:0) transmit data received
from the framer interface is output on XL1/
2. NRZ data (AMI negative data) has to be
provided on XDIN. Latching of data is done
with rising or falling transitions of TCLK
according to bit LIM4.TPE.
Receive Clock
The output functions of these ports are
defined by register CMR.RS(1:0):
CMR.RS(1:0) = 00:
Receive Clock extracted from the incoming
data pulses.
CMR.RS(1:0) = 01:
Receive Clock extracted from the incoming
data pulses. RCLK is set high in case of
loss-of-signal (LSR0.LOS=1).
Selected by GCR.R1S(1:0), one of the four
RCLK(1:4) is output on RCLK1.
The clock frequency is 2.048 (E1)/
1.544 MHz (T1/J1)
CMR.RS(1:0) = 10:
Output of de-jittered system clock sourced
by DCO.
Clock frequency: 2.048 (E1) or 1.544 MHz
(T1/J1). See
Figure 10
on
Pin Descriptions
page
QuadLIU V1.1
PEB 22504
38.
2001-02