CY8CKIT-050 Cypress Semiconductor Corp, CY8CKIT-050 Datasheet - Page 18

• Manufacturer Part Number: CY8CKIT-050
• Description: DEV KIT PSOC 5 CY8C55
• Manufacturer: Cypress Semiconductor Corp
• Series: PSoC®5r
• Type: MCUr

Specifications of CY8CKIT-050

• Design Resources: PSoC 5 Dev Kit Schematic CY8CKIT-050 PCBA BOM CY8CKIT-50 Gerber File
• Contents: Board, Cable, CD, Display, Documentation
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: CY8C55
• Other names: 428-3110

6. System Integration
6.1 Clocking System
The clocking system generates, divides, and distributes clocks
throughout the PSoC system. For the majority of systems, no
external crystal is required. The IMO and PLL together can
generate up to a 67 MHz clock, accurate to ±4% over voltage and
temperature. Additional internal and external clock sources allow
each design to optimize accuracy, power, and cost. All of the
system clock sources can be used to generate other clock
frequencies in the 16-bit clock dividers and UDBs for anything
you want, for example a UART baud rate generator.
Clock generation and distribution is automatically configured
through the PSoC Creator IDE graphical interface. This is based
on the complete system’s requirements. It greatly speeds the
design process. PSoC Creator allows designers to build clocking
systems with minimal input. The designer can specify desired
clock frequencies and accuracies, and the software locates or
builds a clock that meets the required specifications. This is
possible because of the programmability inherent PSoC.
Document Number: 001-66235 Rev. *A
PRELIMINARY
Key features of the clocking system include:
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Seven general purpose clock sources
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Independently sourced clock dividers in all clocks
Eight 16-bit clock dividers for the digital system
Four 16-bit clock dividers for the analog system
Dedicated 16-bit divider for the CPU bus and CPU clock
Automatic clock configuration in PSoC Creator
PSoC
3 to 62 MHz IMO, ±4% at 3 MHz
4- to 25 MHz external crystal oscillator (MHzECO)
Clock doubler provides a doubled clock frequency output for
the USB block, see
DSI signal from an external I/O pin or other logic
24 to 67 MHz fractional phase-locked loop (PLL) sourced
from IMO, MHzECO, or DSI
1 KHz, 33 KHz, 100 KHz ILO for watchdog timer (WDT) and
Sleep Timer
32.768 KHz external crystal oscillator (ECO) for RTC
®
5: CY8C55 Family Datasheet
USB Clock Domain on page
Page 18 of 114
21.
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