CY8CKIT-050 Cypress Semiconductor Corp, CY8CKIT-050 Datasheet - Page 79

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CY8CKIT-050

Manufacturer Part Number
CY8CKIT-050
Description
DEV KIT PSOC 5 CY8C55
Manufacturer
Cypress Semiconductor Corp
Series
PSoC®5r
Type
MCUr
Datasheet

Specifications of CY8CKIT-050

Design Resources
PSoC 5 Dev Kit Schematic CY8CKIT-050 PCBA BOM CY8CKIT-50 Gerber File
Contents
Board, Cable, CD, Display, Documentation
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
CY8C55
Other names
428-3110
Table 11-23. Delta-sigma ADC RMS Noise in Counts vs. Input Range and Sample Rate, 16-bit, Internal Reference, Single Ended
Table 11-24. Delta-sigma ADC RMS Noise in Counts vs. Input Range and Sample Rate, 16-bit, Internal Reference, Differential
Table 11-25. Delta-sigma ADC RMS Noise in Counts vs. Input Range and Sample Rate, 20-bit, External Reference, Single Ended
Document Number: 001-66235 Rev. *A
Figure 11-26. Delta-sigma ADC Noise Histogram, 1000 sam-
ples, 16-bit, 48 ksps, Ext Ref, V
Sample rate,
Sample rate,
Sample rate,
12000
24000
48000
2000
3000
6000
sps
15625
32000
43750
48000
2000
4000
8000
sps
187
23
45
90
sps
8
0 to VREF
1.21
1.28
1.36
1.44
1.67
1.91
0 to VREF
IN
±VREF
0.56
0.58
0.53
0.58
0.60
0.58
0.59
= V
1.28
1.33
1.77
1.65
1.87
REF
/2, Range = ±1.024 V
PRELIMINARY
0 to VREF x 2
±VREF / 2
1.02
1.15
1.22
1.33
1.50
1.60
0.65
0.72
0.72
0.72
0.76
0.75
0 to VREF x 2
1.24
1.28
1.26
0.91
1.06
Input Voltage Range
Input Voltage Range
Figure 11-27. Delta-sigma ADC Noise Histogram, 1000 sam-
ples, 16-bit, 48 ksps, Int Ref, V
Input Voltage Range
PSoC
±VREF / 4
VSSA to VDDA
0.74
0.81
0.82
0.85
®
VSSA to VDDA
5: CY8C55 Family Datasheet
1.14
1.25
1.38
1.43
1.43
1.85
INVALID OPERATING REGION
6.02
6.09
6.28
6.84
7.97
±VREF / 8
1.02
1.10
1.12
1.13
IN
= V
REF
0 to VREF x 6
/2, Range = ±1.024 V
0 to VREF x 6
0.99
1.22
1.22
1.40
1.53
1.67
±VREF / 16
0.97
0.98
0.96
0.95
1.01
Page 79 of 114
1.77
1.98
2.18
2.20
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