S29GL256S10TFI020 Spansion Inc., S29GL256S10TFI020 Datasheet - Page 22

• Manufacturer Part Number: S29GL256S10TFI020
• Description: Flash 256 MBIT 3V 100NS PAGE MODE FLASH
• Manufacturer: Spansion Inc.

Specifications of S29GL256S10TFI020

• Data Bus Width: 16 bit
• Memory Type: Flash
• Memory Size: 256 Mbit
• Architecture: Uniform
• Timing Type: Asynchronous
• Interface Type: CFI
• Access Time: 100 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 100 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSOP-56
• Lead Free Status / Rohs Status: Compliant

22
3.4.8
3.4.9
3.4.9.1
Persistent Protection Mode
Password Protection Mode
If both lock bits are selected to be programmed at the same time, the operation will abort. Once the Password
Mode Lock Bit is programmed, the Persistent Mode Lock Bit is permanently disabled and no changes to the
protection scheme are allowed. Similarly, if the Persistent Mode Lock Bit is programmed, the Password Mode
is permanently disabled.
If the password mode is chosen, the password must be programmed prior to setting the corresponding lock
register bit. After the Password Protection Mode Lock Bit is programmed, a power cycle, hardware reset, or
PPB Lock Bit Set command is required to set the PPB Lock bit to 0 to protect the PPB array.
The programming time of the Lock Register is the same as the typical word programming time. During a Lock
Register programming EA, Data polling Status DQ6 Toggle Bit I will toggle until the programming has
completed. The system can also determine the status of the lock register programming by reading the Status
Register. See
The user is not required to program DQ2 or DQ1, and DQ6 or DQ0 bits at the same time. This allows the user
to lock the SSR before or after choosing the device protection scheme.
The Persistent Protection method sets the PPB Lock to 1 during POR or Hardware Reset so that the PPB bits
are unprotected by a device reset. There is a command to clear the PPB Lock bit to 0 to protect the PPB.
There is no command in the Persistent Protection method to set the PPB Lock bit to 1 therefore the PPB Lock
bit will remain at 0 until the next power-off or hardware reset.
PPB Password Protection Mode
PPB Password Protection Mode allows an even higher level of security than the Persistent Sector Protection
Mode, by requiring a 64-bit password for setting the PPB Lock. In addition to this password requirement, after
power up and reset, the PPB Lock is cleared to 0 to ensure protection at power-up. Successful execution of
the Password Unlock command by entering the entire password sets the PPB Lock to 1, allowing for sector
PPB modifications.
Password Protection Notes:
 The Password Program Command is only capable of programming 0’s.
 The password is all 1’s when shipped from Spansion. It is located in its own memory space and is
 All 64-bit password combinations are valid as a password.
 Once the Password is programmed and verified, the Password Mode Locking Bit must be set in order to
 The Password Mode Lock Bit, once programmed, prevents reading the 64-bit password on the data bus
 The Password Mode Lock Bit is not erasable.
 The exact password must be entered in order for the unlocking function to occur. If the password unlock
 The device requires approximately 100 µs for setting the PPB Lock after the valid 64-bit password is given
accessible through the use of the Password Program and Password Read commands.
prevent reading the password.
and further password programming. All further program and read commands to the password region are
disabled and these commands are ignored. There is no means to verify what the password is after the
Password Protection Mode Lock Bit is programmed. Password verification is only allowed before selecting
the Password Protection mode.
command provided password does not match the hidden internal password, the unlock operation fails in
the same manner as a programming operation on a protected sector. The status register will return to the
ready state with the Program Status Bit set to 1 and the Sector Lock Status Bit set to 1 indicating a failed
programming operation due to a locked sector. In this case it is a failure to change the state of the PPB
Lock bit because it is still protected by the lack of a valid password. The data polling status will remain
active, with DQ7 set to the complement of the DQ7 bit in the last word of the password unlock command,
and DQ6 toggling,
to the device.
Status Register on page 38
D a t a
S h e e t
GL-S MirrorBit
for information on these status bits.
( A d v a n c e
®
Family
I n f o r m a t i o n )
S29GL_128S_01GS_00_01 February 11, 2011