74HC4852PW,118 NXP Semiconductors, 74HC4852PW,118 Datasheet

IC MUX/DEMUX DUAL 4X1 16TSSOP

74HC4852PW,118

Manufacturer Part Number
74HC4852PW,118
Description
IC MUX/DEMUX DUAL 4X1 16TSSOP
Manufacturer
NXP Semiconductors
Series
74HCr
Type
Analog Multiplexerr
Datasheets

Specifications of 74HC4852PW,118

Package / Case
16-TSSOP (0.173", 4.40mm Width)
Function
Multiplexer/Demultiplexer
Circuit
2 x 4:1
On-state Resistance
59 Ohm
Voltage Supply Source
Single Supply
Voltage - Supply, Single/dual (±)
2 V ~ 6 V
Current - Supply
2µA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Channels
2 Channel
On Resistance (max)
650 Ohm @ 2 V
On Time (max)
47.5 ns @ 2 V
Off Time (max)
100 ns @ 2 V
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Power Dissipation
500 mW
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Switches
Dual
Package
16TSSOP
Maximum On Resistance
650@2V Ohm
Maximum Propagation Delay Bus To Bus
38@2V|20@3V|17.5@3.3V|14@4.5V|12.6@6V ns
Maximum Low Level Output Current
25 mA
Multiplexer Architecture
4:1
Maximum Turn-off Time
100@2V ns
Maximum Turn-on Time
47.5@2V ns
Power Supply Type
Single
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74HC4852PW-T
74HC4852PW-T
935282089118

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74HC4852PW,118
Manufacturer:
TexasInstruments
Quantity:
285
1. General description
2. Features
The 74HC4852 is a high-speed Si-gate CMOS device and is specified in compliance with
JEDEC standard no. 7A.
The 74HC4852 is a dual 4-channel analog multiplexer or demultiplexer with common
select inputs (S0 and S1). Both multiplexers have a common active LOW enable input (E),
four independent inputs/outputs (pins nY0 to nY3) and a common input/output (pin nZ).
The device features injection-current effect control, which has excellent value in
automotive applications where voltages in excess of the supply voltage are common.
With E LOW, two of the eight switches are selected (low impedance ON-state) by S0 and
S1. With E HIGH, all switches are in the high-impedance OFF-state, independent of S0
and S1.
The injection-current effect control allows signals at disabled analog input channels to
exceed the supply voltage without affecting the signal of the enabled analog channel. This
eliminates the need for external diode/resistor networks typically used to keep the analog
channel signals within the supply-voltage range.
I
I
I
I
I
74HC4852
Dual 4-channel analog multiplexer/demultiplexer with
injection-current effect control
Rev. 02 — 30 May 2007
Injection-current cross coupling < 1 mV/mA
Wide supply voltage range from 2.0 V to 6.0 V
ESD protection:
Latch-up performance exceeds 100 mA per JESD 78 Class II
Low ON-state resistance:
N
N
N
N
N
N
N
N
HBM JESD22-A114E Class 2 exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
400
215
120
76
59
(typical) at V
(typical) at V
(typical) at V
(typical) at V
(typical) at V
CC
CC
CC
CC
CC
= 4.5 V
= 6.0 V
= 2.0 V
= 3.0 V
= 3.3 V
Product data sheet

Related parts for 74HC4852PW,118

74HC4852PW,118 Summary of contents

Page 1

Dual 4-channel analog multiplexer/demultiplexer with injection-current effect control Rev. 02 — 30 May 2007 1. General description The 74HC4852 is a high-speed Si-gate CMOS device and is specified in compliance with JEDEC standard no. 7A. The 74HC4852 is a ...

Page 2

... NXP Semiconductors 3. Applications I Analog multiplexing and demultiplexing I Digital multiplexing and demultiplexing I Signal gating I Automotive application 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74HC4852D +125 C 74HC4852PW +125 C 74HC4852BQ +125 C 5. Functional diagram Fig 1. Logic symbol 74HC4852_2 Product data sheet ...

Page 3

... NXP Semiconductors Fig 3. Functional diagram 74HC4852_2 Product data sheet 4-channel analog MUX/DEMUX with injection-current effect control 1-OF-4 DECODER GND 8 Rev. 02 — 30 May 2007 74HC4852 INJECTION 13 1Z CURRENT CONTROL INJECTION 12 1Y0 CURRENT CONTROL INJECTION 14 1Y1 CURRENT CONTROL INJECTION 15 1Y2 CURRENT CONTROL INJECTION ...

Page 4

... NXP Semiconductors 6. Pinning information 6.1 Pinning 74HC4852 2Y0 1 2Y2 2Y3 4 2Y1 n.c. GND 8 Fig 4. Pin configuration SO16 and TSSOP16 6.2 Pin description Table 2. Pin description Symbol Pin 2Y0 1 2Y2 2Y3 4 2Y1 n.c. 7 GND 1Y3 11 1Y0 1Y1 14 1Y2 74HC4852_2 Product data sheet ...

Page 5

... NXP Semiconductors 7. Functional description [1] Table 3. Function table Input [ HIGH voltage level LOW voltage level don’t care. 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage ...

Page 6

... NXP Semiconductors 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter V supply voltage CC V input voltage I V switch voltage SW T ambient temperature amb t/ V input transition rise and fall rate 10. Static characteristics Table resistance For test circuit see Figure 8. Symbol Parameter ...

Page 7

... NXP Semiconductors Table 6. R …continued ON resistance For test circuit see Figure 8. Symbol Parameter R ON resistance mismatch between ON channels +125 C amb R ON resistance (peak) ON(peak resistance mismatch between ON channels Table 7. Injection current coupling For test circuit see Figure 9. Symbol Parameter +125 C amb ...

Page 8

... NXP Semiconductors Table 8. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter amb V HIGH-level input voltage IH V LOW-level input voltage IL I input leakage current I I OFF-state leakage current S(OFF) I ON-state leakage current S(ON) I supply current CC C input capacitance I C switch capacitance ...

Page 9

... NXP Semiconductors Table 8. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter I input leakage current I I OFF-state leakage current S(OFF) I ON-state leakage current S(ON) I supply current CC C input capacitance I C switch capacitance +125 C amb V HIGH-level input voltage IH V LOW-level input voltage ...

Page 10

... NXP Semiconductors Table 8. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter C input capacitance I C switch capacitance nYn A GND V I Fig 6. Test circuit for measuring OFF-state leakage current nYn GND Fig 8. Test circuit for measuring ON resistance 74HC4852_2 Product data sheet 4-channel analog MUX/DEMUX with injection-current effect control … ...

Page 11

... NXP Semiconductors 11. Dynamic characteristics Table 9. Dynamic characteristics GND = pF unless specified otherwise; for test circuit see L L Symbol Parameter Conditions propagation delay see pd nZ, nYn to nYn nZ, nYn t enable time see nZ, nYn t disable time see dis E to nZ, nYn propagation delay see ...

Page 12

... NXP Semiconductors Table 9. Dynamic characteristics GND = pF unless specified otherwise; for test circuit see L L Symbol Parameter Conditions propagation delay see pd nZ, nYn to nYn nZ, nYn t enable time see nZ, nYn t disable time see dis E to nZ, nYn Power dissipation capacitance C power dissipation ...

Page 13

... NXP Semiconductors E input nZ or nYn output nZ or nYn output Test data is given in Table 10. Logic levels: V and V are typical output voltage levels that occur with the output load Fig 11. Enable and disable times Table 10. Measurement points Supply voltage Input 2 6 74HC4852_2 ...

Page 14

... NXP Semiconductors a. Input pulse definition Definitions for test circuit load resistance load capacitance including jig and probe capacitance termination resistance should be equal to the output impedance Load circuitry Test data is given in Table 11. Fig 12. Load circuitry for switching times Table 11. Test data Test ...

Page 15

... NXP Semiconductors 13. Package outline SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 16

... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 17

... NXP Semiconductors DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 18

... NXP Semiconductors 14. Abbreviations Table 12. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 15. Revision history Table 13. Revision history Document ID Release date 74HC4852_2 20070530 • Modifications: Typo corrected (“ ...

Page 19

... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...

Page 20

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . 11 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 14 Abbreviations ...

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