AM79C971AKC\WQOCML AMD (ADVANCED MICRO DEVICES), AM79C971AKC\WQOCML Datasheet - Page 210

AM79C971AKC\WQOCML

Manufacturer Part Number
AM79C971AKC\WQOCML
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AM79C971AKC\WQOCML

Operating Supply Voltage (typ)
3.3/5V
Operating Temperature Classification
Commercial
Package Type
PQFP
Mounting
Surface Mount
Pin Count
160
Lead Free Status / Rohs Status
Not Compliant
SWITCHING CHARACTERISTICS: EXTERNAL ADDRESS DETECTION INTERFACE
Note:
1. May need to delay RX_CLK to capture Start Frame Byte Delimiter (SFBD) at 100 Mbps operation.
210
Parameter
Symbol
External Address Detection Interface: Internal PHY
t
t
t
t
t
t
External Address Detection Interface: External PHY - MII @ 25 MHz
t
t
t
t
External Address Detection Interface: External PHY - MII @ 2.5 MHz
t
t
t
Receive Frame Tag Timing with Media Independent Interface
t
t
t
t
EAD1
EAD2
EAD3
EAD4
EAD5
EAD6
EAD7
EAD8
EAD9
EAD10
EAD11
EAD12
EAD13
EAD14
EAD15
EAD16
EAD17
Parameter Name
SRD setup to
SRD hold to
SFBD# change to
EAR deassertion to
rising edge)
EAR assertion after SFD event
(frame rejection)
EAR assertion width
SFBD change from
EAR deassertion to
rising edge)
EAR assertion after SFD event
(frame rejection)
EAR assertion width
EAR deassertion to
rising edge)
EAR assertion after SFD event
(frame rejection)
EAR assertion width
RXFRTGE assertion from SFBD
(first rising edge)
RXFRTGE, RXFRTGD setup to
RX_CLK
RXFRTGE, RXFRTGD hold to
RX_CLK
RXFRTGE deassertion to
SRDCLK
SRDCLK
SRDCLK
RX_CLK
SRDCLK (first
RX_CLK (first
RX_CLK (first
RX_DV
Test Condition
RX_CLK @25 MHz
RX_CLK @2.5 MHz
Am79C971
Min
40
40
-15
50
0
110
0
40
0
50
400
0
500
0
10
10
40
400
Max
+15
51,090
20 (Note 1) ns
5,080
50,800
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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