DJLXT971ALE.A4-835791 Cortina Systems Inc, DJLXT971ALE.A4-835791 Datasheet - Page 25

• Manufacturer Part Number: DJLXT971ALE.A4-835791
• Manufacturer: Cortina Systems Inc

Specifications of DJLXT971ALE.A4-835791

• Lead Free Status / Rohs Status: Not Compliant

LXT971A PHY
Datasheet
249414, Revision 5.2
13 September 2007
5.2
5.2.1
5.2.1.1
Cortina Systems
calculation truncation errors found in traditional DSP-based receivers (typically complex
DSP engines with A/D converters). This results in improved receiver noise and cross-talk
performance.
The OSP signal processing scheme also requires substantially less computational logic
than traditional DSP-based designs. This lowers power consumption and also reduces the
logic switching noise generated by DSP engines. This logic switching noise can be a
considerable source of EMI generated on the device’s power supplies.
The OSP-based LXT971A PHY provides improved data recovery, EMI performance, and
low power consumption.
Network Media / Protocol Support
This section includes the following:
The LXT971A PHY supports both 10BASE-T and 100BASE-TX Ethernet over twisted-pair
or 100 Mbps Ethernet over fiber media (100BASE-FX).
10/100 Network Interface
The network interface port consists of five external pins (two differential signal pairs and a
signal detect pin). The I/O pins are shared between twisted-pair (TP) and fiber. For
specific pin assignments, see
The LXT971A PHY output drivers can generate one of the following outputs:
When not transmitting data, the LXT971A PHY generates IEEE 802.3-compliant link
pulses or idle code. Depending on the mode selected, input signals are decoded as one of
the following:
Auto-negotiation/parallel detection or manual control is used to determine the speed of
this interface.
Twisted-Pair Interface
The LXT971A PHY supports either 100BASE-TX or 10BASE-T connections over 100 Ω,
Category 5, Unshielded Twisted Pair (UTP) cable. When operating at 100 Mbps, the
LXT971A PHY continuously transmits and receives MLT3 symbols. When not transmitting
data, the LXT971A PHY generates “IDLE” symbols.
During 10 Mbps operation, Xilink* Manchester-encoded data is exchanged. When no data
is being exchanged, the line is left in an idle state. Link pulses are transmitted periodically
to keep the link up.
®
•
•
•
• 100BASE-TX
• 10BASE-T
• 100BASE-FX
• 100BASE-TX
• 10BASE-T
• 100BASE-FX
LXT971A Single-Port 10/100 Mbps PHY Transceiver
Section 5.2.1, 10/100 Network Interface
Section 5.2.2, MII Data Interface
Section 5.2.3, Configuration Management Interface
Section 4.0, Signal Descriptions, on page
5.2 Network Media / Protocol
17.
Support
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