AT24C512C-XHM-B Atmel, AT24C512C-XHM-B Datasheet - Page 7

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AT24C512C-XHM-B

Manufacturer Part Number
AT24C512C-XHM-B
Description
Manufacturer
Atmel
Datasheet

Specifications of AT24C512C-XHM-B

Lead Free Status / Rohs Status
Compliant
8720A–SEEPR–9/10
Figure 4-3.
Notes:
Figure 4-4.
Figure 4-5.
SDA
SDA
SCL
SCL
SDA
SCL
1. The write cycle time, t
WORDn
START
cycle
Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O)
Data Validity
Start and Stop Definition
8th BIT
DATA STABLE
WR
, is the time from a valid stop condition of a write sequence to the end of the internal clear/write
ACK
CHANGE
DATA
CONDITION
STOP
DATA STABLE
STOP
t
wr
(1)
CONDITION
START
Atmel AT24C512C
7

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