AM29LV400BT-90EC Spansion Inc., AM29LV400BT-90EC Datasheet - Page 24

• Manufacturer Part Number: AM29LV400BT-90EC
• Manufacturer: Spansion Inc.

Specifications of AM29LV400BT-90EC

• Cell Type: NOR
• Density: 4Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 19/18Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 512K/256K
• Supply Current: 12mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

program or erase operation. If it is still toggling, the de-
vice did not completed the operation successfully, and
the system must write the reset command to return to
reading array data.
The remaining scenario is that the system initially de-
termines that the toggle bit is toggling and DQ5 has
not gone high. The system may continue to monitor
the toggle bit and DQ5 through successive read cy-
cles, determining the status as described in the previ-
ous paragraph. Alternatively, it may choose to perform
other system tasks. In this case, the system must start
at the beginning of the algorithm when it returns to de-
termine the status of the operation (top of Figure 6).
DQ5: Exceeded Timing Limits
DQ5 indicates whether the program or erase time has
exceeded a specified internal pulse count limit. Under
these conditions DQ5 produces a “1.” This is a failure
condition that indicates the program or erase cycle
was not successfully completed.
The DQ5 failure condition may appear if the system
tries to program a “1” to a location that is previously
programmed to “0.” Only an erase operation can
change a “0” back to a “1.” Under this condition, the
device halts the operation, and when the operation
has exceeded the timing limits, DQ5 produces a “1.”
Under both these conditions, the system must issue
the reset command to return the device to reading
array data.
DQ3: Sector Erase Timer
After writing a sector erase command sequence, the
system may read DQ3 to determine whether or not an
erase operation has begun. (The sector erase timer
does not apply to the chip erase command.) If addi-
tional sectors are selected for erasure, the entire
time-out also applies after each additional sector
erase command. When the time-out is complete, DQ3
switches from “0” to “1.” If the time between additional
sector erase commands from the system can be as-
sumed to be less than 50 µs, the system need not
monitor DQ3. See also the “Sector Erase Command
Sequence” section.
After the sector erase command sequence is written,
the system should read the status on DQ7 (Data# Poll-
ing) or DQ6 (Toggle Bit I) to ensure the device has ac-
cepted the command sequence, and then read DQ3. If
DQ3 is “1”, the internally controlled erase cycle has
begun; all further commands (other than Erase Sus-
pend) are ignored until the erase operation is com-
plete. If DQ3 is “0”, the device will accept additional
sector erase commands. To ensure the command has
been accepted, the system software should check the
status of DQ3 prior to and following each subsequent
sector erase command. If DQ3 is high on the second
22
D A T A
Am29LV400B
S H E E T
status check, the last command might not have been
accepted. Table 6 shows the outputs for DQ3.
Notes:
1. Read toggle bit twice to determine whether or not it is
2. Recheck toggle bit because it may stop toggling as DQ5
toggling. See text.
changes to “1”. See text.
No
Figure 6. Toggle Bit Algorithm
Complete, Write
Reset Command
Read DQ7–DQ0
Read DQ7–DQ0
Read DQ7–DQ0
Program/Erase
Operation Not
Toggle Bit
Toggle Bit
= Toggle?
DQ5 = 1?
= Toggle?
START
Twice
Yes
Yes
Yes
(Notes
1, 2)
21523D4 December 4, 2006
(Note 1)
Operation Complete
No
No
Program/Erase