TC58FVM5T2ATG65 Toshiba, TC58FVM5T2ATG65 Datasheet - Page 8

• Manufacturer Part Number: TC58FVM5T2ATG65
• Manufacturer: Toshiba

Specifications of TC58FVM5T2ATG65

• Cell Type: NOR
• Density: 32Mb
• Access Time (max): 65ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 22/21Bit
• Operating Supply Voltage (typ): 2.5/3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP-I
• Program/erase Volt (typ): 8.5 to 9.5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 4M/2M
• Supply Current: 55mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Compliant

ID Read Mode
EPROM programmers to identify the device type automatically.
(1) Applying V
(2) Input command sequence
Standby Mode
(1) Control using CE and RESET
(2) Control using RESET only
Auto-Sleep Mode
the device will automatically enter Sleep Mode and the current will be reduced to the standby current (I
However, if the device is in the process of performing simultaneous operation, the device will not enter Standby
Mode but will instead cause the operating current to flow. Because the output data is latched, data is output in
Sleep Mode. When the address is changed, Sleep Mode is automatically released, and data from the new
address is output.
Output Disable Mode
ID Read Mode is used to read the device maker code and device code. The mode is useful in that it allows
ID read can be executed in two ways, as follows:
There are two ways to put the device into Standby Mode.
This function suppresses power dissipation during reading. If the address input does not change for 150 ns,
Inputting V
Mode, outputting the maker code from address 00H and the device code from address 01H. Releasing V
from A9 returns the device to Read Mode. With this method all banks are set to ID Read Mode; thus,
simultaneous operation cannot be performed.
specified bank to ID Read Mode. Banks are specified by inputting the bank address (BK) in the third Bus
Write cycle of the Command cycle. To read an ID code, the bank address as well as the ID read address must
be specified (with
is output from address BK + 01. From other banks data are output from the memory cells. Inputting a Reset
command releases ID Read Mode and returns the device to Read Mode.
ID Code Table.
Mode and the current will be reduced to the standby current (I
process of performing simultaneous operation, the device will not enter Standby Mode but will instead
cause the operating current to flow.
current will be reduced to the standby current (I
simultaneous operation, this method will terminate the current operation and set the device to Standby
Mode. This is a hardware reset and is described later.
This method is used mainly by EPROM programmers. Applying V
With this method simultaneous operation can be performed. Inputting an ID Read command sets the
Access time in ID Read Mode is the same as that in Read Mode. For a list of the codes, please refer to the
With the device in Read Mode, input V
With the device in Read Mode, input V
In Standby Mode DQ is put in High-Impedance state.
IH
ID
to OE disables output from the device and sets DQ to High-Impedance.
to A9
WP
/ACC
= V
IH
or V
IL
DD
SS
). The maker code is output from address BK + 00; the device code
± 0.3 V to RESET . The device will enter Standby Mode and the
± 0.3 V to CE and RESET . The device will enter Standby
DDS1
). Even if the device is in the process of performing
TC58FVM5(T/B)(2/3)A(FT/XB)65
DDS1
). However, if the device is in the
ID
to A9 sets the device to ID Read
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DDS2
ID
).