CY7C0832V-167AC Cypress Semiconductor Corp, CY7C0832V-167AC Datasheet - Page 22

• Manufacturer Part Number: CY7C0832V-167AC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C0832V-167AC

• Density: 4.5Mb
• Access Time (max): 4ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 167MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 18b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 2
• Supply Current: 300mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 120
• Word Size: 18b
• Number Of Words: 256K
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-06059 Rev. *K
Switching Waveforms
Notes:
45. CE
46. This timing is valid when one port is writing, and other port is reading the same location at the same time. If t
47. If t
Left_Port (L_Port) Write to Right_Port (R_Port) Read
CLK
L_PORT
ADDRESS
R/W
L_PORT
DATA
CLK
R_PORT
ADDRESS
R/W
R_PORT
DATA
If t
CCS
CCS
L
L
R
R
0
IN
OUT
= OE = ADS = CNTEN = BE0 – BE1 = LOW; CE
< minimum specified value, then R_Port will Read the most recent data (written by L_Port) only (2 * t
> minimum specified value, then R_Port will Read the most recent data (written by L_Port) (t
t
CKHZ
t
CH2
t
t
CH2
CYC2
t
t
CYC2
CL2
(continued)
t
SW
t
t
SD
SA
t
CL2
D
A
n
n
t
HA
t
CCS
t
SA
1
t
= CNTRST = MRST = CNT/MSK = HIGH.
HW
t
HD
PRELIMINARY
A
n
[45, 46, 47]
t
HA
t
CKLZ
t
DC
t
CD2
CYC2
+ t
CY7C0830V/CY7C0831V
CY7C0832V/CY7C0833V
Q
CCS
CYC2
CD2
n
) after the rising edge of R_Port's clock.
is violated, indeterminate data will be Read out.
+ t
CD2
) after the rising edge of R_Port's clock.
CY7C0837V
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