CY7C0832V-167AC Cypress Semiconductor Corp, CY7C0832V-167AC Datasheet - Page 24

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CY7C0832V-167AC

Manufacturer Part Number
CY7C0832V-167AC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C0832V-167AC

Density
4.5Mb
Access Time (max)
4ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
167MHz
Operating Supply Voltage (typ)
3.3V
Address Bus
18b
Package Type
TQFP
Operating Temp Range
0C to 70C
Number Of Ports
2
Supply Current
300mA
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
120
Word Size
18b
Number Of Words
256K
Lead Free Status / Rohs Status
Not Compliant
Document #: 38-06059 Rev. *K
Switching Waveforms
MailBox Interrupt Timing
Table 7. Read/Write and Enable Operation (Any Port)
Notes:
53. CE
54. Address “7FFFF” is the mailbox location for R_Port of the 9Mb device.
55. L_Port is configured for Write operation, and R_Port is configured for Read operation.
56. At least one byte enable (BE0 – BE1) is required to be active during interrupt operations.
57. Interrupt flag is set with respect to the rising edge of the Write clock, and is reset with respect to the rising edge of the Read clock.
58. OE is an asynchronous input signal.
59. When CE changes state, deselection and Read happen after one cycle of latency.
60. CE
CLK
L_PORT
ADDRESS
INT
CLK
R_PORT
ADDRESS
OE
R
X
X
X
H
L
L
R
0
0
= OE = ADS = CNTEN = LOW; CE
= OE = LOW; CE
CLK
X
t
CH2
1
= R/W = HIGH.
t
CH2
t
[53, 54, 55, 56, 57]
CYC2
Inputs
t
CYC2
(continued)
t
CE
CL2
H
X
L
L
L
t
t
7FFFF
SA
CL2
0
1
t
SA
= CNTRST = MRST = CNT/MSK = HIGH.
A
t
HA
m
t
t
HA
SINT
CE
X
H
H
H
L
1
PRELIMINARY
A
n
A
R/W
[1, 16, 58, 59, 60]
m+1
X
X
H
X
L
A
n+1
DQ
7FFFF
Outputs
High-Z
High-Z
High-Z
D
0
D
OUT
– DQ
IN
t
RINT
17
CY7C0830V/CY7C0831V
CY7C0832V/CY7C0833V
A
n+2
A
Deselected
Deselected
Write
Read
Outputs Disabled
m+3
Operation
CY7C0837V
A
n+3
A
m+4
Page 24 of 28

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