CY7C67200-48BAI Cypress Semiconductor Corp, CY7C67200-48BAI Datasheet - Page 35

• Manufacturer Part Number: CY7C67200-48BAI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C67200-48BAI

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: FBGA
• Rad Hardened: No
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-08014 Rev. *G
EP5 Interrupt Enable (Bit 5)
The EP5 Interrupt Enable bit enables or disables an endpoint
five (EP5) Transaction Done interrupt. An EPx Transaction
Done interrupt triggers when any of the following responses or
events occur in a transaction for the device’s given Endpoint:
send/receive ACK, send STALL, Timeout occurs, IN Exception
Error, or OUT Exception Error. In addition, the NAK Interrupt
Enable bit in the Device n Endpoint Control register can also
be set so that NAK responses triggers this interrupt.
1: Enable EP5 Transaction Done interrupt
0: Disable EP5 Transaction Done interrupt
EP4 Interrupt Enable (Bit 4)
The EP4 Interrupt Enable bit enables or disables an endpoint
four (EP4) Transaction Done interrupt. An EPx Transaction
Done interrupt triggers when any of the following responses or
events occur in a transaction for the device’s given Endpoint:
send/receive ACK, send STALL, Timeout occurs, IN Exception
Error, or OUT Exception Error. In addition, the NAK Interrupt
Enable bit in the Device n Endpoint Control register can also
be set so that NAK responses triggers this interrupt.
1: Enable EP4 Transaction Done interrupt
0: Disable EP4 Transaction Done interrupt
EP3 Interrupt Enable (Bit 3)
The EP3 Interrupt Enable bit enables or disables an endpoint
three (EP3) Transaction Done interrupt. An EPx Transaction
Done interrupt triggers when any of the following responses or
events occur in a transaction for the device’s given Endpoint:
send/receive ACK, send STALL, Timeout occurs, IN Exception
Error, or OUT Exception Error. In addition, the NAK Interrupt
Enable bit in the Device n Endpoint Control register can also
be set so that NAK responses triggers this interrupt.
1: Enable EP3 Transaction Done interrupt
0: Disable EP3 Transaction Done interrupt
EP2 Interrupt Enable (Bit 2)
The EP2 Interrupt Enable bit enables or disables an endpoint
two (EP2) Transaction Done interrupt. An EPx Transaction
Done interrupt triggers when any of the following responses or
events occur in a transaction for the device’s given Endpoint:
send/receive ACK, send STALL, Timeout occurs, IN Exception
Error, or OUT Exception Error. In addition, the NAK Interrupt
Enable bit in the Device n Endpoint Control register can also
be set so that NAK responses triggers this interrupt.
1: Enable EP2 Transaction Done interrupt
0: Disable EP2 Transaction Done interrupt
EP1 Interrupt Enable (Bit 1)
The EP1 Interrupt Enable bit enables or disables an endpoint
one (EP1) Transaction Done interrupt. An EPx Transaction
Done interrupt triggers when any of the following responses or
events occur in a transaction for the device’s given Endpoint:
send/receive ACK, send STALL, Timeout occurs, IN Exception
Error, or OUT Exception Error. In addition, the NAK Interrupt
Enable bit in the Device n Endpoint Control register can also
be set so that NAK responses triggers this interrupt.
1: Enable EP1 Transaction Done interrupt
0: Disable EP1 Transaction Done interrupt
EP0 Interrupt Enable (Bit 0)
The EP0 Interrupt Enable bit enables or disables an endpoint
zero (EP0) Transaction Done interrupt. An EPx Transaction
Done interrupt triggers when any of the following responses or
events occur in a transaction for the device’s given Endpoint:
send/receive ACK, send STALL, Timeout occurs, IN Exception
Error, or OUT Exception Error. In addition, the NAK Interrupt
Enable bit in the Device n Endpoint Control register can also
be set so that NAK responses triggers this interrupt.
1: Enable EP0 Transaction Done interrupt
0: Disable EP0 Transaction Done interrupt
Reserved
All reserved bits must be written as ‘0’.
CY7C67200
Page 35 of 78
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