CYNSE70064A-66BGC Cypress Semiconductor Corp, CYNSE70064A-66BGC Datasheet - Page 54

• Manufacturer Part Number: CYNSE70064A-66BGC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE70064A-66BGC

• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (min): 1.7V
• Operating Supply Voltage (max): 1.9V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Package Type: BGA
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

The logical 136-bit Search operation is shown in Figure 10-34. The entire table (eight devices of 136-bit entries) is compared to
a 136-bit word K (presented on the DQ bus in cycles A and B of the command) using the GMR and local mask bits. The GMR is
the 136-bit word specified by the even and odd global mask pair selected by the GMR Index in the command’s cycle A.
The 136-bit word K (presented on the DQ bus in cycles A and B of the command) is also stored in the even and odd comparand
registers specified by the Comparand Register Index in the command’s cycle B. In ×136 configurations, the even and odd
comparand registers can subsequently be used by the Learn command in only one of the devices (the first non-full device). The
word K (presented on the DQ bus in cycles A and B of the command) is compared to each entry in the table starting at location
0. The first matching entry’s location, address L, is the winning address that is driven as part of the SRAM address on the
SADR[21:0] lines (see “SRAM Addressing” on page 101). The global winning device will drive the bus in a specific cycle. On
global miss cycles the device with LRAM = 1 (the default driving device for the SRAM bus) and LDEV = 1 (the default driving
device for SSF and SSV signals) will be the default driver for such missed cycles. Note. During 136-bit searches of
136-bit-configured tables, the Search hit will always be at an even address.
The Search command is a pipelined operation and executes a Search at half the rate of the frequency of CLK2X for 136-bit
searches in ×136-configured tables. The latency of SADR, CE_L, ALE_L, WE_L, SSV, and SSF from the 136-bit Search
command cycle (two CLK2X cycles) is shown in Table 10-21.
Table 10-21. Search Latency from Instruction to SRAM Access Cycle
For one to eight devices in the table and TLSZ = 01, the latency of a Search from command to SRAM access cycle is 5. In addition,
SSV and SSF shift further to the right for different values of HLAT as specified in Table 10-22.
Table 10-22. Shift of SSF and SSV from SADR
Document #: 38-02041 Rev. *F
Number of Devices
1–31 (TLSZ = 10)
1–8 (TLSZ = 01)
1 (TLSZ = 00)
HLAT
000
001
010
100
101
011
110
111
Must be same in each of the eight
Will be same in each of the eight
Comparand Register (odd)
Comparand Register (even)
67
devices
devices
Figure 10-34. ×136 Table with Eight Devices
Max Table Size
128K × 136 bits
496K × 136 bits
16K × 136 bits
A
B
0
Location
address
262142
GMR
L
0
2
4
6
K
135
135
Number of CLK Cycles
(136-bit configuration)
Even
CFG = 01010101
A
0
1
2
3
4
5
6
7
Odd
B
Latency in CLK Cycles
0
0
(First matching entry)
4
5
6
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