W77C32F-40 Nuvoton Technology Corporation of America, W77C32F-40 Datasheet - Page 37

• Manufacturer Part Number: W77C32F-40
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W77C32F-40

• Lead Free Status / Rohs Status: Supplier Unconfirmed

9.2 MOVX Instruction
The W77C32, like the standard 8032, uses the MOVX instruction to access external Data Memory.
This Data Memory includes both off-chip memory as well as memory mapped peripherals. While the
results of the MOVX instruction are the same as in the standard 8032, the operation and the timing of
the strobe signals have been modified in order to give the user much greater flexibility.
The MOVX instruction is of two types, the MOVX @Ri and MOVX @DPTR. In the MOVX @Ri, the
address of the external data comes from two sources. The lower 8-bits of the address are stored in
the Ri register of the selected working register bank. The upper 8-bits of the address come from the
port 2 SFR. In the MOVX @DPTR type, the full 16-bit address is supplied by the Data Pointer.
Since the W77C32 has two Data Pointers, DPTR and DPTR1, the user has to select between the two
by setting or clearing the DPS bit. The Data Pointer Select bit (DPS) is the LSB of the DPS SFR,
which exists at location 86h. No other bits in this SFR have any effect, and they are set to 0. When
DPS is 0, then DPTR is selected, and when set to 1, DPTR1 is selected. The user can switch between
DPTR and DPTR1 by toggling the DPS bit. The quickest way to do this is by the INC instruction. The
advantage of having two Data Pointers is most obvious while performing block move operations. The
accompanying code shows how the use of two separate Data Pointers speeds up the execution time
for code performing the same task.
Block Move with single Data Pointer:
; SH and SL are the high and low bytes of Source Address
; DH and DL are the high and low bytes of Destination Address
; CNT is the number of bytes to be moved
PORT 2
CLK
PSEN
AD7-0
ALE
C1
Instruction Fetch
A7-0
Address A15-8
C2
C3
OP-CODE
C4
C1
Operand Fetch
A7-0
Address A15-8
C2
Figure 7: Five Cycle Instruction Timing
OPERAND
C3
C4
C1
Operand Fetch
A7-0
Address A15-8
- 37 -
C2
OPERAND
C3
C4
Publication Release Date: December 20, 2005
C1
Operand Fetch
A7-0
Address A15-8
C2
W77C32/W77C032
OPERAND
C3
C4
C1
Operand Fetch
A7-0
Address A15-8
C2
OPERAND
C3
Revision A5
C4