AM29DL323DB-120EI Spansion Inc., AM29DL323DB-120EI Datasheet - Page 4

• Manufacturer Part Number: AM29DL323DB-120EI
• Manufacturer: Spansion Inc.

Specifications of AM29DL323DB-120EI

• Cell Type: NOR
• Density: 32Mb
• Access Time (max): 120ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 22/21Bit
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 3/8.5 to 9.5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 4M/2M
• Supply Current: 16mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 6
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 7
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 10
Common Flash Memory Interface (CFI) . . . . . . . 22
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 25
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 31
December 13, 2005
Special Handling Instructions for FBGA Package .......................... 8
Word/Byte Configuration .............................................................. 10
Requirements for Reading Array Data ......................................... 10
Writing Commands/Command Sequences .................................. 11
Simultaneous Read/Write Operations
with Zero Latency .........................................................................11
Standby Mode .............................................................................. 11
Automatic Sleep Mode .................................................................11
RESET#: Hardware Reset Pin .....................................................12
Output Disable Mode ...................................................................12
Autoselect Mode .......................................................................... 17
Sector/Sector Block Protection and Unprotection ........................ 18
Write Protect (WP#) .....................................................................19
Temporary Sector Unprotect ........................................................19
SecSi
Flash Memory Region ..................................................................21
Hardware Data Protection ............................................................22
Reading Array Data ......................................................................25
Reset Command ..........................................................................26
Autoselect Command Sequence ..................................................26
Enter SecSi
Command Sequence ...................................................................26
Byte/Word Program Command Sequence ................................... 26
Chip Erase Command Sequence .................................................27
Sector Erase Command Sequence ..............................................28
Erase Suspend/Erase Resume Commands ................................ 28
DQ7: Data# Polling ......................................................................31
RY/BY#: Ready/Busy# ................................................................. 32
Figure 1. Temporary Sector Unprotect Operation................................. 19
Figure 2. In-System Sector Protection/
Sector Unprotection Algorithms ............................................................ 20
Figure 3. Program Operation ................................................................ 27
Figure 4. Erase Operation..................................................................... 29
Figure 5. Data# Polling Algorithm ......................................................... 31
TM
(Secured Silicon) Sector
TM
Sector/Exit SecSi Sector
Am29DL322D/323D/324D
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 35
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 36
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 38
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 39
Erase And Programming Performance . . . . . . . 51
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 51
TSOP And SO Pin Capacitance . . . . . . . . . . . . . . 51
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 52
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 54
DQ6: Toggle Bit I .......................................................................... 32
DQ2: Toggle Bit II ......................................................................... 33
Reading Toggle Bits DQ6/DQ2 .................................................... 33
DQ5: Exceeded Timing Limits ...................................................... 33
DQ3: Sector Erase Timer ............................................................. 33
Word/Byte Configuration (BYTE#) ............................................... 41
Erase and Program Operations ................................................... 42
Temporary Sector Unprotect ........................................................ 47
Alternate CE# Controlled Erase and Program Operations ........... 49
FBD063—63-ball Fine-Pitch Ball Grid Array (FBGA) 8 x 14 mm . 52
TS 048—48-Pin Standard TSOP ................................................. 53
Figure 6. Toggle Bit Algorithm .............................................................. 32
Figure 7. Maximum Negative Overshoot Waveform............................. 35
Figure 8. Maximum Positive Overshoot Waveform .............................. 35
Figure 9. I
Automatic Sleep Currents).................................................................... 37
Figure 10. Typical I
Figure 11. Test Setup .......................................................................... 38
Figure 12. Input Waveforms and Measurement Levels ........................ 38
Figure 13. Read Operation Timings...................................................... 39
Figure 14. Reset Timings...................................................................... 40
Figure 15. BYTE# Timings for Read Operations .................................. 41
Figure 16. BYTE# Timings for Write Operations .................................. 41
Figure 17. Program Operation Timings ................................................ 43
Figure 18. Accelerated Program Timing Diagram ................................ 43
Figure 19. Chip/Sector Erase Operation Timings ................................. 44
Figure 20. Back-to-back Read/Write Cycle Timings ............................. 45
Figure 21. Data# Polling Timings (During Embedded Algorithms) ....... 45
Figure 22. Toggle Bit Timings (During Embedded Algorithms) ............ 46
Figure 23. DQ2 vs. DQ6 ....................................................................... 46
Figure 24. Temporary Sector Unprotect Timing Diagram..................... 47
Figure 25. Sector/Sector Block Protect and Unprotect Timing Diagram 48
Figure 26. Alternate CE# Controlled Write (Erase/Program)
Operation Timings ................................................................................ 50
CC1
Current vs. Time (Showing Active and
CC1
vs. Frequency................................................... 37
3