AM29PL160CB-90SI AMD (ADVANCED MICRO DEVICES), AM29PL160CB-90SI Datasheet - Page 24

• Manufacturer Part Number: AM29PL160CB-90SI
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM29PL160CB-90SI

• Lead Free Status / Rohs Status: Not Compliant

7.4
7.5
24
7.3.1
7.3.2
7.3.3
Standby Mode
Automatic Sleep Mode
Write Buffer
Accelerated Program Operation
Autoselect Functions
Write Buffer Programming allows the system write to a maximum of 16 words/32 bytes in one programming
operation. This results in faster effective programming time than the standard programming algorithms. See
Write Buffer on page 24
The device offers accelerated program operations through the ACC function. This is one of two functions
provided by the WP#/ACC or ACC pin, depending on model number. This function is primarily intended to
allow faster manufacturing throughput at the factory.
If the system asserts V
mode, temporarily unprotects any protected sector groups, and uses the higher voltage on the pin to reduce
the time required for program operations. The system would use a two-cycle program command sequence as
required by the Unlock Bypass mode. Removing V
number, returns the device to normal operation. Note that the WP#/ACC or ACC pin must not be at V
operations other than accelerated programming, or device damage may result. WP# contains an internal pull-
up; when unconnected, WP# is at V
If the system writes the autoselect command sequence, the device enters the autoselect mode. The system
can then read autoselect codes from the internal register (which is separate from the memory array) on DQ7–
DQ0. Standard read cycle timings apply in this mode. Refer to
Command Sequence on page 53
When the system is not reading or writing to the device, it can place the device in the standby mode. In this
mode, current consumption is greatly reduced, and the outputs are placed in the high impedance state,
independent of the OE# input.
The device enters the CMOS standby mode when the CE# and RESET# pins are both held at V
(Note that this is a more restricted voltage range than V
V
standard access time (t
ready to read data.
If the device is deselected during erasure or programming, the device draws active current until the operation
is completed.
Refer to
The automatic sleep mode minimizes Flash device energy consumption. The device automatically enables
this mode when addresses remain stable for t
CE#, WE#, and OE# control signals. Standard address access timings provide new data when addresses are
changed. While in sleep mode, output data is latched and always available to the system. Refer to
Characteristics on page 70
IO
± 0.3 V, the device is in the standby mode, but the standby current is greater. The device requires
DC Characteristics on page 70
HH
CE
for more information.
) for read access when the device is in either of these standby modes, before it is
on this pin, the device automatically enters the aforementioned Unlock Bypass
for the automatic sleep mode current specification.
for more information.
IH
.
for the standby current specification.
S29GL-A
D a t a
ACC
+ 30 ns. The automatic sleep mode is independent of the
HH
from the WP#/ACC or ACC pin, depending on model
S h e e t
IH
.) If CE# and RESET# are held at V
Autoselect Mode on page 40
S29GL-A_00_A12 May 21, 2008
and
IH
, but not within
IO
Autoselect
± 0.3 V.
DC
HH
for