AM29PL160CB-90SI AMD (ADVANCED MICRO DEVICES), AM29PL160CB-90SI Datasheet - Page 65

• Manufacturer Part Number: AM29PL160CB-90SI
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM29PL160CB-90SI

• Lead Free Status / Rohs Status: Not Compliant

10.6
May 21, 2008 S29GL-A_00_A12
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete,
or whether the device entered the Erase Suspend mode. Toggle Bit I may be read at any address, and is
valid after the rising edge of the final WE# pulse in the command sequence (prior to the program or erase
operation), and during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any address cause
DQ6 to toggle. The system may use either OE# or CE# to control the read cycles. When the operation is
complete, DQ6 stops toggling.
After an erase command sequence is written, if all sectors selected for erasing are protected, DQ6 toggles for
approximately 100 µs, then returns to reading array data. If not all selected sectors are protected, the
Embedded Erase algorithm erases the unprotected sectors, and ignores the selected sectors that are
protected.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or is erase-
suspended. When the device is actively erasing (that is, the Embedded Erase algorithm is in progress), DQ6
toggles. When the device enters the Erase Suspend mode, DQ6 stops toggling. However, the system must
also use DQ2 to determine which sectors are erasing or erase-suspended. Alternatively, the system can use
DQ7 (see
If a program address falls within a protected sector, DQ6 toggles for approximately 1 µs after the program
command sequence is written, then returns to reading array data.
DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Embedded Program
algorithm is complete.
Table 10.2 on page 68
bit algorithm.
the differences between DQ2 and DQ6 in graphical form. See
DQ7: Data# Polling on page
Figure 16.9 on page 81
shows the outputs for Toggle Bit I on DQ6.
D a t a
S h e e t
shows the toggle bit timing diagrams.
63).
S29GL-A
DQ2: Toggle Bit II on page
Figure 10.4 on page 66
Figure 16.10 on page 81
66.
shows the toggle
shows
65