MD3331-D64-V3-X SanDisk, MD3331-D64-V3-X Datasheet
MD3331-D64-V3-X
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MD3331-D64-V3-X Summary of contents
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Mobile DiskOnChip Plus 16/32MByte 1.8V I/O Flash Disk, Protection and Security-Enabling Features Highlights Mobile DiskOnChip Plus 16/32MByte (128/256Mbit) is one of the industry’s most efficient storage solutions, with the fastest write rates, the smallest size and lowest power consumption. Additionally, ...
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Boot Capability Programmable Boot Block with XIP functionality to replace boot ROM: 1KB for 16MB devices 2KB for 32MB devices Download Engine (DE) for automatic download of boot code from Programmable Boot Block Boot capabilities: CPU initialization Platform initialization OS ...
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R H EVISION ISTORY Revision Date 1.7 September 2004 3 Change Description Mechanical dimensions updated. Data Sheet, Rev. 1.8 Mobile DiskOnChip Plus 16/32MByte Reference Section 10.5 95-SR-000-10-8L ...
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T C ABLE OF ONTENTS 1. Introduction ............................................................................................................................... 7 2. Product Overview ...................................................................................................................... 8 2.1 Product Description ............................................................................................................ 8 2.2 Standard Interface ............................................................................................................ 10 2.2.1 Ball Diagram ....................................................................................................................... 10 2.2.2 System Interface ................................................................................................................ 11 2.2.3 Signal Description .............................................................................................................. 12 2.3 ...
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General Description.......................................................................................................... 29 6.1.1 Built-In Operating System Support..................................................................................... 30 6.1.2 TrueFFS Software Development Kit (SDK)........................................................................ 30 6.1.3 File Management................................................................................................................ 30 6.1.4 Bad-Block Management ..................................................................................................... 30 6.1.5 Wear-Leveling .................................................................................................................... 30 6.1.6 Power Failure Management ............................................................................................... 31 6.1.7 Error Detection/Correction.................................................................................................. 31 ...
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Connecting Signals........................................................................................................... 47 9.3.1 Standard Interface.............................................................................................................. 47 9.3.2 Multiplexed Interface .......................................................................................................... 48 9.4 Implementing the Interrupt Mechanism ............................................................................ 48 9.4.1 Hardware Configuration ..................................................................................................... 48 9.4.2 Software Configuration....................................................................................................... 48 9.5 Platform-Specific Issues ................................................................................................... 49 9.5.1 Wait State ........................................................................................................................... 49 9.5.2 ...
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I NTRODUCTION This data sheet includes the following sections: Overview of data sheet contents Section 1: Product overview, including a brief product description, pin and ball diagrams and Section 2: signal descriptions Theory of operation for the major building ...
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P O RODUCT VERVIEW 2.1 Product Description Mobile DiskOnChip Plus 16/32MB is a member of M-Systems’ DiskOnChip product series based on a single die (16MB) or dual die (32MB) with an embedded flash controller and flash ...
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Pocket PC, Smartphone, Windows CE/.NET, OSE, Nucleus, and Linux. Customers developing for target platforms not supported by TrueFFS binary drivers can use the TrueFFS Software Development Kit (SDK) developer guide. For customized boot solutions, M-Systems provides the DiskOnChip Boot Software ...
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Standard Interface 2.2.1 Ball Diagram See Figure 1 for the Mobile DiskOnChip Plus standard interface FBGA ball diagram. To ensure proper device functionality, balls marked RSRVD are reserved for future use and should not be connected ...
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System Interface See Figure 2 for a simplified I/O diagram for a standard interface. CE#, OE#, WE# Host System Bus System Interface Figure 2: Standard Interface Simplified I/O Diagram 11 A[12:0] Mobile DiskOnChip Plus BHE# D[15:0] ID[1:0] IF_CFG LOCK# ...
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Signal Description The ball designations are listed in the signal descriptions, presented in logic groups, in Table 1. Table 1: Standard Interface Signal Descriptions Input Signal Ball No. Type A[12:11] D8 A[10:8] F7, E7, C7 A[7:4] C3, ...
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Input Signal Ball No. Type IRQ# F9 RSTIN VCCQ J6 VCC J5 VSS G3, J9 RSRVD K6 Other. See Figure The following abbreviations are used: IN Standard (non-Schmidt) input ST Schmidt Trigger input ...
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Multiplexed Interface 2.3.1 Ball Diagram See Figure 3 for the Mobile DiskOnChip Plus multiplexed interface FBGA ball diagram. To ensure proper device functionality, balls marked RSRVD are reserved for future use and should not be connected ...
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System Interface See Figure 4 for a simplified I/O diagram. Host System Bus Figure 4: Multiplexed Interface Simplified I/O Diagram 15 CE#, OE#, WE# Mobile DiskOnChip Plus AD[15:0] ID0 LOCK# AVD# System Interface Configuration Data Sheet, Rev. 1.8 Mobile ...
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Signal Description The ball designations are listed in the signal descriptions, presented in logic groups, in Table 2. Table 2: Multiplexed Interface Signal Descriptions Input Signal Ball No. Type AD[15:12] H8, K8, H7, J7, IN AD[11:8] K5, J4, H4, ...
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Input Signal Ball No. Type VSS C3, C7, C8, D2, D3, D8, E2, E3, E4, E7, F2, F3, F7, G2, G3, J9 RSRVD K6 Other. See Figure The following abbreviations are used: IN Standard (non-Schmidt) ...
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T O HEORY OF PERATION 3.1 Overview Figure 5: Standard Interface Simplified Block Diagram Mobile DiskOnChip Plus consists of the following major functional blocks, as shown in Figure 5. • System Interface for host interface • Configuration Interface for ...
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System Interface The system interface block provides an easy-to-integrate SRAM-like (also EEPROM-like) interface to Mobile DiskOnChip Plus, enabling it to interface with various CPU interfaces, such as a local bus, ISA bus, SRAM interface, EEPROM interface or any other ...
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A protection area may be protected by either/both of these hardware mechanisms: • 64-bit protection key • Hard-wired LOCK# signal The size and location of each area is user-defined to provide maximum flexibility for the target platform and application requirements. ...
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When the maximum number of Mobile DiskOnChip Plus devices are cascaded, the Programmable Boot Block provides 4KB of boot block area. The Programmable Boot Block of each device is mapped to a unique address space. 3.6 Download Engine (DE) Upon ...
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Data Pipeline Mobile DiskOnChip Plus uses a two-stage pipeline mechanism, designed for maximum performance while enabling on-the-fly data manipulation, such as read/write protection and Error Detection/Error Correction. 3.9 Control & Status The Control & Status block contains registers responsible ...
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H P ARDWARE ROTECTION 4.1 Method of Operation Mobile DiskOnChip Plus enables the user to define two partitions that are protected (in hardware) against any combination of read or write operations. The two protected areas can be configured as ...
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Read/write protection is disabled in each one of the following events: • Power-down • Change of any protection attribute (not necessarily in the same partition) • Write operation to the IPL area • ...
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Blocks 0, 1 and 2 in Mobile DiskOnChip Plus contain the following information: Block 0 o Bad Block Table (page 2). Contains the mapping information to unusable Erase units on the flash media. o UID (16 bytes). This number is ...
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M O ODES OF PERATION Mobile DiskOnChip Plus has three modes of operation: • Reset • Normal • Deep Power-Down Mode changes can occur due to any of the following events, as shown in Figure 9: • Assertion of ...
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Normal Mode This is the mode in which standard operations involving the flash memory are performed. Normal mode is automatically entered when a valid write sequence is sent to the DiskOnChip Control register and Control Confirmation register. The boot ...
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To exit Deep Power-Down mode, perform the following sequence: • Read four times from address 1FFFH. The data returned is undefined. (This option is valid for both standard and multiplexed interfaces). • Perform a single read cycle from the Programmable ...
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T FFS T RUE ECHNOLOGY 6.1 General Description M-Systems’ patented TrueFFS technology was designed to maximize the benefits of flash memory while overcoming inherent flash limitations that would otherwise reduce its performance, reliability and lifetime. TrueFFS emulates a hard ...
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Built-In Operating System Support The TrueFFS driver is integrated into all major OSs, including Symbian OS, Windows CE, Pocket PC, Smartphone, OSE, Nucleus, and others. For a complete listing of all available drivers, please refer to M-Systems’ website www.m-systems.com. ...
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To overcome this inherent deficiency, TrueFFS uses M-Systems’ patented wear-leveling algorithm. The wear-leveling algorithm ensures that consecutive writes of a specific sector are not written physically to the same page in the flash. This spreads flash media usage evenly across ...
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Special Features through I/O Control (IOCTL) Mechanism In addition to standard storage device functionality, the TrueFFS driver provides extended functionality. This functionality goes beyond simple data storage capabilities to include features such as: format the media, read/write protect, binary ...
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Memory Window in Mobile DiskOnChip Plus 16MB TrueFFS utilizes an 8KB memory window in the CPU address space consisting of four 2KB sections, as depicted in Figure 11. When in Reset mode, the Programmable Boot Block in sections ...
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Memory Window for Mobile DiskOnChip Plus 32MB TrueFFS utilizes an 8KB memory window in the CPU address space consisting of four 2KB sections, as depicted in Figure 11. When in Reset mode, the Programmable Boot Block in sections ...
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R D EGISTER ESCRIPTIONS This section describes various Mobile DiskOnChip Plus registers and their functions, as listed in Table 3. This section can be used to enable the designer to better evaluate DiskOnChip technology. Address (Hex) 1000 1002 1004 ...
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Chip Identification (ID) Register Description: This register is used to identify the device residing on the host platform. It always returns 41H when read. Address (hex): 1000 Type: Read only Reset Value: 41H Bit 7 Bit 6 Bit 5 ...
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DiskOnChip Control Register/Control Confirmation Register Description: These two registers are identical and contain information on the operation mode of Mobile DiskOnChip Plus. After writing the required value to the DiskOnChip Control register, the complement of that data byte must ...
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Device ID Select Register Description cascaded configuration, this register controls which device provides the register space. The value of bits ID[0:1] is compared to the value of the ID configuration input balls, as defined in Section 9.6. ...
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Output Control Register Description: This register controls the behavior of certain output balls. Address (hex): 100C Type: Read/Write Reset Value: 01H Bit 7 Bit 6 Bit 5 RFU_0 Bit No. 0-2, 4-7 Reserved for future use. 3 SLOCK [Sticky ...
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Interrupt Control Description: Interrupts may be generated when the flash transitions from the busy state to the ready state data protection violation. Address (hex): 100E Type: Read/Write Reset Value: 00H Bit 7 Bit 6 Bit 5 ...
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Toggle Bit Register Description: This register identifies the presence of the device. Address (hex): 1046 Type: Read Only Reset Value: 82H Bit 7 Bit 6 Bit 5 RFU Bit No 3-7 Reserved for future use. 2 TOGGLE. ...
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B M OOTING FROM OBILE 8.1 Introduction Mobile DiskOnChip Plus can function both as a flash disk and the system boot device. If DiskOnChip is configured as a flash disk, it can operate as the OS boot device. DiskOnChip ...
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From this point onward, Mobile DiskOnChip Plus appears as a standard disk drive assigned a drive letter and can be used by any application, without any modifications to either the BIOS set-up or the autoexec.bat/config.sys files. Mobile DiskOnChip ...
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Non-PC Architectures In non-PC architectures, the boot code is executed from a boot ROM, and the drivers are usually loaded from the storage device. When using Mobile DiskOnChip Plus as the system boot device, the CPU fetches the first ...
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D C ESIGN ONSIDERATIONS 9.1 Design Environment Mobile DiskOnChip Plus provides a complete design environment consisting of: • Evaluation Boards (EVB) for enabling software integration and development with Mobile DiskOnChip Plus, even before the target platform is available. An ...
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System Interface 9.2.1 Standard Interface Mobile DiskOnChip Plus uses an SRAM-like interface that can easily be connected to any microprocessor bus. With a standard interface, it requires 13 address lines, 8 data lines and basic memory control signals (CE#, ...
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Multiplexed Interface With a multiplexed interface, Mobile DiskOnChip Plus requires the signals shown in Figure 15 below. 0.1 uF Address/Data AVD# Output Enable W rite Enable Chip Enable Reset Chip ID 9.3 Connecting Signals 9.3.1 Standard Interface Mobile DiskOnChip ...
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Byte High Enable (BHE#) – This signal definition is compatible with 16 bit platforms that use the BHE#/BLE# protocol. This signal is only relevant during the boot phase. • Hardware Lock (LOCK#) – This signal prevents the use of ...
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Output sensitivity: Either edge or level triggered Note: Refer to Section 7.10 for further information on the value to be written to this register. 2. The host interrupt is configured to the selected input sensitivity, either edge or level. ...
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Busy Signal The Busy signal (BUSY#) indicates that Mobile DiskOnChip Plus has not yet completed internal initialization. After reset, BUSY# is asserted while the IPL is downloaded into the internal boot block and the Data Protection Structures (DPS) are ...
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Data Access Mode In a 32-bit bus system that cannot execute byte- or word-aligned accesses, the system address lines SA0 and SA1 are always zero. Consecutive long-words (32-bit) are differentiated by SA2 toggling. Therefore, in 32-bit systems that ...
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Figure 17 illustrates the configuration required to cascade four devices on the host bus. Only the relevant cascading signals are included in this figure, although all other signals must also be connected. VSS VCC VSS VSS 1st ID0 ID1 CE# ...
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Figure 18: Memory Map in a Cascaded Configuration 53 Normal Mode (after setting MAX_ID) Reset Mode Section 0 IPL 0 IPL 0 Programmable Boot IPL 1 IPL 0 Block Section 1 Flash Area 00H Window Section ...
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P S RODUCT PECIFICATIONS 10.1 Environmental Specifications 10.1.1 Operating Temperature Ranges Commercial Temperature Range: Extended Temperature Range: 10.1.2 Thermal Characteristics Junction to Case (θ 10.1.3 Humidity 10% to 90% relative, non-condensing. 10.1.4 Endurance Mobile DiskOnChip Plus is based on ...
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Electrical Specifications 10.3.1 Absolute Maximum Ratings Parameter DC Core Supply Voltage DC I/O Supply Voltage Input Pin Voltage Input pin Current Storage Temperature Lead Temperature Maximum duration of applying VCCQ without VCC or VCC without VCCQ 1. Permanent device ...
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DC Electrical Characteristics Over Operating Range Table 11: DC Characteristics, 1.65V to 1.95V I/O Parameter Symbol Core Supply Voltage VCC I/O Supply Voltage VCCQ High-level Input Voltage V Low-level Input Voltage V High-level Output V Voltage Low-level Output V ...
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Parameter Symbol Core Supply Voltage I/O Supply Voltage High-level Input Voltage Low-level Input Voltage High-level Output Voltage Low-level Output Voltage High-level Output Current Low-level Output Current 1, Input Leakage Current Output Leakage Current 3 Active Supply Current Standby Supply Current ...
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Timing Specifications 10.4.1 Read Cycle Timing Standard Interface A[12:0], BHE# CE# T (CE1) HO OE# WE# D[15:0] Figure 19: Standard Interface Read Cycle Timing A[12:0], BHE# CE# T (CE1) HO OE# WE# D[15:0] Figure 20: Standard Interface Read Cycle ...
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Table 14: Standard Interface Read Cycle Timing Parameters (VCC=2.5-3.6V) Symbol Description Tsu(A) Address to OE# Tho(A) OE# to Address hold time Tsu(CE0) CE# to OE# Tho(CE0) OE# to CE# Tho(CE1) OE# or WE# to CE# Tsu(CE1) CE# to WE# Trec(OE) ...
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CE# may be asserted any time before or after OE# is asserted. If CE# is asserted after OE#, all timing relative to when OE# was asserted will be referenced to the time CE# was asserted. 2. CE# may be ...
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Table 17: Standard Interface Write Cycle Parameters (VCC=2.7V-3.6V) Symbol Description T (A) Address to WE# SU Tho(A) WE# to Address hold time Tw(WE) WE# asserted width T Write Cycle Time WCYC Tsu (CE0) CE# to WE# Tho (CE0) WE# to ...
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Table 18: Multiplexed Interface Read Cycle Parameters (VCC 2.5-3.6V) Symbol Description tsu(AVD) Address to AVD# tho(AVD) Address to AVD# Tw(AVD) AVD# low pulse width 1 tsu(CE0) CE# to OE# setup time 2 tho(CE0) OE# to CE# hold time tho(CE1) OE# ...
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Write Cycle Timing Multiplexed Interface AVD# T AD[15: CE# OE# WE# Figure 23: Multiplexed Interface Write Cycle Timing Table 20: Multiplexed Interface Write Cycle Parameters (VCC=2.5V-3.6V) Symbol tsu(AVD) Address to AVD# tho(AVD) Address to AVD# Tw(AVD) AVD# ...
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Table 21: Multiplexed Interface Write Cycle Parameters (VCC=2.7-3.6V) Symbol tsu(AVD) Address to AVD# tho(AVD) Address to AVD# Tw(AVD) AVD# low pulse width 1 tsu(AVD-WE) AVD# to WE# Trec(WE-AVD) WE# to AVD# WE# asserted width (RAM) tw(WE) WE# asserted width (all ...
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Power-Up Timing Mobile DiskOnChip Plus is reset by assertion of the RSTIN# input. When this signal is negated, DiskOnChip initiates a download procedure from the flash memory into the internal Programmable Boot Block. During this procedure, Mobile DiskOnChip Plus ...
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Symbol 1 T (VCC-RSTIN) VCC/VCCQ stable to RSTIN# REC 1 Tp (VCC-BUSY0) VCC/VCCQ stable to BUSY# T (RSTIN) RSTIN# asserted pulse width W T (BUSY0) RSTIN (BUSY1) RSTIN (BUSY-CE) BUSY (D-BUSY1) ...
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Mechanical Dimensions See Figure 26 for the mechanical dimensions of the FBGA package. FBGA Dimensions (16MB): 9.0±0. 12.0±0. 1.1±0.1 mm FBGA Dimensions (32MB): 9.0±0. 12.0±0. 1.3±0.1 mm Ball Pitch: 0.8mm 9.0 ...
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... O I RDERING NFORMATION MD3x31-Dxx-V3Q18-T-C : M-Systems MD3831 – Mobile DiskOnChip Plus FBGA MD DiskOnChip MD3331 – Mobile DiskOnChip Plus dual-die FBGA : Capacity 16 Voltage V3Q18 V : Temperature Range Blank Composition Blank C P Summary of available configurations: Table 24: Available Mobile DiskOnChip Plus Configurations Capacity Package 16 MB (128 Mb) ...
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ONTACT S USA M-Systems Inc. 8371 Central Ave, Suite A Newark CA 94560 Phone: +1-510-494-2090 Fax: +1-510-494-5545 Japan M-Systems Japan Inc. Asahi Seimei Gotanda Bldg., 3F 5-25-16 Higashi-Gotanda Shinagawa-ku Tokyo, 141-0022 Phone: +81-3-5423-8101 Fax: +81-3-5423-8102 ...