MD3331-D64-V3-X SanDisk, MD3331-D64-V3-X Datasheet - Page 27

• Manufacturer Part Number: MD3331-D64-V3-X
• Manufacturer: SanDisk
• Type: Flash Diskr

Specifications of MD3331-D64-V3-X

• Density: 64MByte
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Package Type: FBGA
• Mounting: Surface Mount
• Pin Count: 69
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.5V
• Operating Supply Voltage (max): 3.6V
• Programmable: Yes
• Lead Free Status / Rohs Status: Not Compliant

5.1
This is the mode in which standard operations involving the flash memory are performed. Normal
mode is automatically entered when a valid write sequence is sent to the DiskOnChip Control
register and Control Confirmation register. The boot detector circuit triggers the software to set the
device to Normal mode.
A write cycle occurs when both the CE# and WE# inputs are asserted. Similarly, a read cycle occurs
when both the CE# and OE# inputs are asserted. Because the flash controller generates its internal
clock from these CPU cycles and some read operations return volatile data, it is essential that the
specified timing requirements contained in Section 10.4.1 be met. It is also essential that read and
write cycles are not interrupted by glitches or ringing on the CE#, WE#, OE# address inputs. All
inputs to Mobile DiskOnChip Plus are Schmidt Trigger types to improve noise immunity.
In Normal mode, Mobile DiskOnChip Plus responds to every valid hardware cycle. When there is
no activity, it is possible to reduce the power consumption to a typical deep-power-down current of
10 µA (16MB) or 20 µA (32MB) by setting the device in Deep Power-Down mode.
5.2
In Reset mode, Mobile DiskOnChip Plus ignores all write cycles, except for those to the
DiskOnChip Control register and Control Confirmation register. All register read cycles return a
value of 00H. Before attempting to perform a register read operation, the device is set to Normal
mode by the TrueFFS software.
5.3
In Deep Power-Down mode, Mobile DiskOnChip Plus internal high current voltage regulators are
disabled to reduce quiescent power consumption to 10 µA (16MB) or 20 µA (32MB) (Typ.). The
following signals are also disabled in this mode:
•
•
To enter Deep Power-Down mode, a proper sequence must be written to the DiskOnChip Control
registers and DiskOnChip Control Confirmation register, and the CE# input must be negated
(CE# = VCC). All other inputs should be VSS or VCC.
An additional option for setting the device into Deep Power-Down mode, when in Normal mode, is
by asserting the RSTIN# signal and holding it in the low state (see the dotted line in Figure 9).
When the RSTIN# signal is released, the device is set in Reset mode.
In Deep Power-Down mode, write cycles have no effect and read cycles return indeterminate data
(Mobile DiskOnChip Plus does not drive the data bus). Entering Deep Power-Down mode and then
returning to the previous mode does not affect the value of any register.
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Standard interface: input buffers A[12:0], BHE#, WE#, D[15:0] and OE# (when CE# is
negated)
Multiplexed interface: input buffers AD[15:0], AVD#,WE# and OE# (when CE# is negated).
Normal Mode
Reset Mode
Deep Power-Down Mode
Data Sheet, Rev. 1.8
Mobile DiskOnChip Plus 16/32MByte
95-SR-000-10-8L