STA333BW STMicroelectronics, STA333BW Datasheet - Page 3

• Manufacturer Part Number: STA333BW
• Manufacturer: STMicroelectronics

Specifications of STA333BW

• Operational Class: Class-AB
• Audio Amplifier Output Configuration: 1-Channel Mono/2-Channel Stereo
• Audio Amplifier Function: Speaker
• Total Harmonic Distortion: 0.2@8Ohm@1W%
• Single Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (typ): 3.3/5/9/12/15/18V
• Power Supply Requirement: Quad
• Rail/rail I/o Type: No
• Power Supply Rejection Ratio: 80dB
• Single Supply Voltage (min): Not RequiredV
• Single Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): 2.7/4.5V
• Dual Supply Voltage (max): 3.6/21.5V
• Operating Temp Range: -20C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 36
• Package Type: PowerSSO EP
• Lead Free Status / Rohs Status: Compliant

STA333BW
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
Configuration registers (addr 0x00 to 0x05) . . . . . . . . . . . . . . . . . . . . . . . 22
6.1.1
6.1.2
6.1.3
6.1.4
6.1.5
6.1.6
Volume control registers (addr 0x06 - 0x0A) . . . . . . . . . . . . . . . . . . . . . . 40
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
Audio preset registers (addr 0x0B and 0x0C) . . . . . . . . . . . . . . . . . . . . . 43
6.3.1
6.3.2
Channel configuration registers (addr 0x0E - 0x10) . . . . . . . . . . . . . . . . . 45
Tone control register (addr 0x11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Dynamic control registers (addr 0x12 - 0x15) . . . . . . . . . . . . . . . . . . . . . 47
6.6.1
6.6.2
6.6.3
6.6.4
6.6.5
User-defined coefficient control registers (addr 0x16 - 0x26) . . . . . . . . . . 53
6.7.1
6.7.2
6.7.3
6.7.4
6.7.5
6.7.6
6.7.7
6.7.8
Variable max power correction registers (addr 0x27 - 0x28) . . . . . . . . . . 59
Distortion compensation registers (addr 0x29 - 0x2A) . . . . . . . . . . . . . . . 59
Fault detect recovery constant registers (addr 0x2B - 0x2C) . . . . . . . . . . 59
Configuration register A (addr 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Configuration register B (addr 0x01) . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Configuration register C (addr 0x02) . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Configuration register D (addr 0x03) . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Configuration register E (addr 0x04) . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Configuration register F (addr 0x05) . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Mute / line output configuration register (addr 0x06) . . . . . . . . . . . . . . . 41
Master volume register (addr 0x07) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Channel 1 volume (addr 0x08) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Channel 2 volume (addr 0x09) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Channel 3 / line output volume (addr 0x0A) . . . . . . . . . . . . . . . . . . . . . . 42
Audio preset register 1 (addr 0x0B) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Audio preset register 2 (addr 0x0C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Limiter 1 attack / release rate (addr 0x12) . . . . . . . . . . . . . . . . . . . . . . . 47
Limiter 1 attack / release threshold (addr 0x13) . . . . . . . . . . . . . . . . . . . 47
Limiter 2 attack / release rate (addr 0x14) . . . . . . . . . . . . . . . . . . . . . . . 48
Limiter 2 attack / release threshold (addr 0x15) . . . . . . . . . . . . . . . . . . . 48
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Coefficient address register (addr 0x16) . . . . . . . . . . . . . . . . . . . . . . . . 53
Coefficient b1 data register bits (addr 0x17 - 0x19) . . . . . . . . . . . . . . . . 53
Coefficient b2 data register bits (addr 0x1A - 0x1C) . . . . . . . . . . . . . . . 53
Coefficient a1 data register bits (addr 0x1D - 0x1F) . . . . . . . . . . . . . . . 53
Coefficient a2 data register bits (addr 0x20 - 0x22) . . . . . . . . . . . . . . . . 54
Coefficient b0 data register bits (addr 0x23 - 0x25) . . . . . . . . . . . . . . . . 54
Coefficient read / write control register (addr 0x26) . . . . . . . . . . . . . . . . 54
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Doc ID 13773 Rev 3
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