TDA5250XT Infineon Technologies, TDA5250XT Datasheet - Page 26

• Manufacturer Part Number: TDA5250XT
• Manufacturer: Infineon Technologies

Specifications of TDA5250XT

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 4.4mm
• Product Length (mm): 9.7mm
• Operating Supply Voltage (min): 2.1V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / Rohs Status: Compliant

Table 2-8
Table 2-9
Table 2-10
Table 2-10
* mandatory HIGH
3-wire Bus Mode
In this mode pin 2 (BusMode)= HIGH and Pin 16 (BusData) is in the data input/output pin. Pin 24
(EN) is used to activate the bus interface to allow the transfer of data to / from the device. When pin
24 (EN) is inactive (HIGH), data transfer is inhibited.
Data Transition:
Data transition on pin 16 (BusData) can only occur if the clock BusCLK is LOW. To perform a data
transfer the interface has to be enabled. This is done by setting the EN line to LOW. A serial transfer
is done via BusData, BusCLK and EN. The bit stream needs no chip address.
Data Transfer Write Mode:
To start the communication the EN line has to be set to LOW. The desired sub address byte and
data bytes have to follow. The subaddress (00H...0FH) determines which of the data bytes are
transmitted. At the end of data transition the EN must be HIGH.
Data transfer Read Mode:
To start the communication in the read mode, the EN line has to be set to LOW followed by the sub
address to read (80H, 81H). Afterwards the device is ready to read out data. At the end of data
transition EN must be HIGH.
Data Sheet
STA
STA
STA
MSB CHIP ADDRESS (WRITE) LSB
MSB CHIP ADDRESS (WRITE) LSB
R7
MSB
MSB
1
1
1
1
1
1
1
1
CHIP ADDRESS
1
0
R6
(WRITE)
0
I
I
I
I
0
2
2
2
2
0
C Bus Write Mode 8 Bit
C Bus Write Mode 16 Bit
C Bus Read Mode
C Bus Read Mode (continued)
0
0
0
0
0
0
0
R5
0
0
LSB
0
0
ACK S7
DATA OUT FROM SUB ADDRESS
ACK S7
ACK
MSB
R4
MSB
MSB
S6
S7
SUB ADDRESS (READ)
S6
S5
S6
00H...08H, 0DH, 0EH, 0FH
SUB ADDRESS (WRITE)
00H...08H, 0DH, 0EH, 0FH
SUB ADDRESS (WRITE)
S5
80H, 81H
S4
S5
R3
S4
S3
S4
26
S3
S2
S3
S2
S1
R2
S2
LSB
S0 ACK STA
S1
S1
LSB
LSB
S0 ACK D15 ... D8 ACK D7 D6 ...
S0 ACK D7
R1
MSB
MSB
MSB
1
Functional Description
D6 D5 D4 D3 D2 D1 D0 ACK STO
1
CHIP ADDRESS (READ)
R0
LSB
1
DATA IN
0
DATA IN
0
TDA5250 D2
ACK*
Version 1.7
0
0
LSB
2007-02-26
D0
LSB
LSB
1
ACK STO
STO
ACK