TDA5250XT Infineon Technologies, TDA5250XT Datasheet - Page 28

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TDA5250XT

Manufacturer Part Number
TDA5250XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TDA5250XT

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
4.4mm
Product Length (mm)
9.7mm
Operating Supply Voltage (min)
2.1V
Operating Supply Voltage (max)
5.5V
Lead Free Status / Rohs Status
Compliant
Subaddress Organization
Table 2-13
Table 2-14
Data Byte Specification
Table 2-15
Note D3: Function is only active in selfpolling and timer mode. When D3 is set to LOW the RX path
is not enabled if PwdDD pin is set to LOW. A delayed setting of D3 results in a delayed power ON
of the RX building blocks.
Data Sheet
MSB
MSB
1
1
D15
D14
D13
D12
D11
D10
0
0
0
0
0
0
0
0
0
0
0
0
Bit
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
F_COUNT_MODE
0
0
0
0
0
0
0
0
0
0
0
0
RX_DATA_INV
ADC_MODE
TESTMODE
ASK_NFSK
CONTROL
LNA_GAIN
Sub Addresses of Data Registers Write
Sub Addresses of Data Registers Read
Sub Address 00H: CONFIG
Function
PA_PWR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
MODE_2
MODE_1
RX_NTX
CLK_EN
ALL_PD
SLICER
D_OUT
EN_RX
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
1
1
0
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
LSB
0= CLK off during power down, 1= always CLK on, ever in PD
LSB
0
1
0
1
0
1
0
1
0
1
0
1
0= disable receiver, 1= enable receiver (in self polling and
0
1
0= RX/TX and ASK/FSK external controlled, 1= Register
HEX
0Dh
0Eh
0Fh
00h
01h
02h
03h
04h
05h
06h
07h
08h
HEX
80h
81h
0= slave or timer mode, 1= self polling mode
0= normal operation, 1= all Power down
0= no Data inversion, 1= Data inversion
0= Data out if valid, 1= always Data out
0= low TX Power, 1= high TX Power
0= normal operation, 1=Testmode
XTAL_TUNING
XTAL_CONFIG
Function
COUNT_TH1
COUNT_TH2
STATUS
0= Lowpass, 1= Peak Detector
BLOCK_PD
0= slave mode, 1= timer mode
OFF_TIME
RSSI_TH3
ON_TIME
Function
CLK_DIV
ADC
CONFIG
0= one shot, 1= continuous
0= one shot, 1= continuous
0= low gain, 1= high gain
28
FSK
LPF
0= FSK, 1=ASK
timer mode) *
0= TX, 1=RX
Description
controlled
Results of comparison: ADC & WINDOW
Configuration and Ratio of clock divider
I/Q and data filter cutoff frequencies
Higher threshold of window counter
Lower threshold of window counter
General definition of status bits
Building Blocks Power Down
OFF time of wakeup counter
ON time of wakeup counter
Threshold for RSSI signal
Values for FSK-shift
XTAL configuration
Nominal frequency
ADC data out
Description
Description
Functional Description
TDA5250 D2
Version 1.7
2007-02-26
Default
Bit Length
Bit Length
0
0
0
0
0
1
0
0
1
1
1
1
1
0
0
1
16
16
16
16
16
16
16
16
8
8
8
8
8
8

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