SC28L92A1B NXP Semiconductors, SC28L92A1B Datasheet - Page 40
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SC28L92A1B
Manufacturer Part Number
SC28L92A1B
Description
UART Interface IC UART DUAL W/FIFO
Manufacturer
NXP Semiconductors
Type
Dual UARTr
Datasheet
1.SC28L92A1B557.pdf
(73 pages)
Specifications of SC28L92A1B
Number Of Channels
2
Data Rate
230.4 Kbps
Supply Voltage (max)
5 V
Supply Voltage (min)
3.3 V
Supply Current
25 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Package / Case
PQFP-44
Description/function
Single-chip CMOS-LSI communications device
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V, 5 V
Lead Free Status / Rohs Status
Details
Other names
SC28L92A1B,557
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SC28L92A1B
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Company:
Part Number:
SC28L92A1B,528
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Company:
Part Number:
SC28L92A1B,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Company:
Part Number:
SC28L92A1B,557
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Company:
Part Number:
SC28L92A1BS,528
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Company:
Part Number:
SC28L92A1BS,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
SC28L92_7
Product data sheet
Table 45.
Bit
3 and 2
1 and 0
Symbol
-
-
OPCR - Output configuration control register (address 0xD) bit description
Description
OP3 output select
OP2 output select
Rev. 07 — 19 December 2007
00 = The complement of OPR[3]
01 = The counter/timer output, in which case OP3 acts as an open-drain
output. In the timer mode, this output is a square wave at the programmed
frequency. In the counter mode, the output remains HIGH until terminal
count is reached, at which time it goes LOW. The output returns to the
HIGH state when the counter is stopped by a stop counter command. Note
that this output is not masked by the contents of the IMR.
10 = The 1 clock for the channel B transmitter, which is the clock that
shifts the transmitted data. If data is not being transmitted, a free running
1 clock is output.
11 = The 1 clock for the channel B receiver, which is the clock that
samples the received data. If data is not being received, a free running 1
clock is output.
00 = The complement of OPR[2]
01 = The 16 clock for the channel A transmitter. This is the clock selected
by CSRA[3:0], and will be a 1 clock if CSRA[3:0] = 1111.
10 = The 1 clock for the channel A transmitter, which is the clock that
shifts the transmitted data. If data is not being transmitted, a free running
1 clock is output.
11 = The 1 clock for the channel A receiver, which is the clock that
samples the received data. If data is not being received, a free running 1
clock is output.
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter
SC28L92
© NXP B.V. 2007. All rights reserved.
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