A25L040-F AMIC, A25L040-F Datasheet - Page 16
![58T1307](/photos/40/61/406111/ge8dip-40_sml.jpg)
A25L040-F
Manufacturer Part Number
A25L040-F
Description
58T1307
Manufacturer
AMIC
Datasheet
1.A25L040-F.pdf
(39 pages)
Specifications of A25L040-F
Memory Type
Flash
Memory Size
4Mbit
Memory Configuration
4M X 1
Interface Type
Serial, SPI
Clock Frequency
100MHz
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
DIP
No. Of Pins
8
Rohs Compliant
Yes
Fast Read Dual Output (3Bh)
The Fast Read Dual Output (3Bh) instruction is similar to the
Fast_Read (0Bh) instruction except the data is output on two
pins, DO and DIO, instead of just DO. This allows data to be
transferred from the A25L040 at twice the rate of standard
SPI devices.
Similar to the Fast Read instruction, the Fast Read Dual
Output instruction can operate at the highest possible
frequency
Figure 10. FAST_READ_DUAL_OUTPUT Instruction Sequence and Data-Out Sequence
(October, 2010, Version 1.2)
of
DIO
DIO
DO
DO
S
S
C
C
f
C
(See
Note: Address bits A23 to A19 are Don’t Care, for A25L040.
32 33 34 35 36 37 38 39
7
0 1
6 5 4
AC
High Impedance
Dummy Byte
Characteristics).
2 3 4
Instruction
3
2
5 6
1
0
7
MSB
40 41 42 43 44 45 46 47
6 4 2 0 6 4 2 0 6 4 2 0 6 4 2 0
This
7 5 3 1 7 5 3
MSB
23 22 21
DIO switches from input to output
8
Data Out 1
9
is
24-Bit Address
10
15
accomplished by adding eight “dummy” clocks after the
24-bit address as shown in figure 10. The dummy clocks
allow the device’s internal circuits additional time for setting
up the initial address. The input data during the dummy
clocks is “don’t care”. However, the DIO pin should be
high-impedance prior to the falling edge of the first data out
clock.
3 2 1
28 29 30 31
Data Out 2
1
0
0
MSB
7 5 3 1 7 5 3 1
Data Out 3
AMIC Technology Corp.
Data Out 4
A25L040 Series
MSB
7