XCB56362PV100 Freescale Semiconductor, XCB56362PV100 Datasheet - Page 17

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XCB56362PV100

Manufacturer Part Number
XCB56362PV100
Description
DSP Floating-Point 24-Bit 100MHz 100MIPS 144-Pin LQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of XCB56362PV100

Package
144LQFP
Numeric And Arithmetic Format
Floating-Point
Maximum Speed
100 MHz
Ram Size
33 KB
Device Million Instructions Per Second
100 MIPS

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Freescale Semiconductor
Signal Name
HWR/HWR
HRD/HRD
HDS/HDS
PB10
HRW
PB11
PB12
HA2
HA9
Input, Output, or
Input, Output, or
Input, Output, or
Disconnected
Disconnected
Disconnected
Type
Input
Input
Input
Input
Input
Input
State during Reset
GPIO Disconnected Host Address Input 2—When the HDI08 is programmed to
GPIO Disconnected Host Read/Write—When HDI08 is programmed to interface a
GPIO Disconnected Host Data Strobe—When HDI08 is programmed to interface a
Table 2-9 Host Interface (continued)
DSP56362 Technical Data, Rev. 4
interface a non-multiplexed host bus and the HI function is
selected, this signal is line 2 of the host address (HA2) input bus.
Host Address 9—When HDI08 is programmed to interface a
multiplexed host bus and the HI function is selected, this signal
is line 9 of the host address (HA9) input bus.
Port B 10—When the HDI08 is configured as GPIO, this signal
is individually programmed as input, output, or internally
disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
single-data-strobe host bus and the HI function is selected, this
signal is the Host Read/Write (HRW) input.
Host Read Data—When HDI08 is programmed to interface a
double-data-strobe host bus and the HI function is selected, this
signal is the host read data strobe (HRD) Schmitt-trigger input.
The polarity of the data strobe is programmable, but is configured
as active-low (HRD) after reset.
Port B 11—When the HDI08 is configured as GPIO, this signal
is individually programmed as input, output, or internally
disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
single-data-strobe host bus and the HI function is selected, this
signal is the host data strobe (HDS) Schmitt-trigger input. The
polarity of the data strobe is programmable, but is configured as
active-low (HDS) following reset.
Host Write Data—When HDI08 is programmed to interface a
double-data-strobe host bus and the HI function is selected, this
signal is the host write data strobe (HWR) Schmitt-trigger input.
The polarity of the data strobe is programmable, but is configured
as active-low (HWR) following reset.
Port B 12—When the HDI08 is configured as GPIO, this signal
is individually programmed as input, output, or internally
disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 5 V tolerant.
Signal Description
Host Interface (HDI08)
2-11

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