DA28F640J5-150 Intel, DA28F640J5-150 Datasheet - Page 45

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DA28F640J5-150

Manufacturer Part Number
DA28F640J5-150
Description
Flash Mem Parallel 5V 64M-Bit 8M x 8/4M x 16 150ns 56-Pin SSOP
Manufacturer
Intel
Datasheet

Specifications of DA28F640J5-150

Package
56SSOP
Cell Type
NOR
Density
64 Mb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
5 V
Sector Size
128KByte x 64
Support Of Common Flash Interface
Yes
Timing Type
Asynchronous
Operating Temperature
0 to 70 °C
Interface Type
Parallel

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NOTE:
C
AC test inputs are driven at V
(2.0 V
AC test inputs are driven at 2.7V for a Logic "1" and 0.0V for a Logic "0." Input timing begins, and output timing ends, at 1.35 V
(50% of V
L
Includes Jig Capacitance
Under Test
ADVANCE INFORMATION
Figure 15. Transient Equivalent Testing
TTL
Device
2.7
0.0
) and V
0.45
CCQ
2.4
). Input rise and fall times (10% to 90%) <10 ns.
Figure 13. Transient Input/Output Reference Waveform for V
Figure 14. Transient Input/Output Reference Waveform for V
IL
(0.8 V
Input
Input
Load Circuit
TTL
). Output timing ends at V
1.3V
OH
(2.4 V
R
L
1N914
C
= 3.3 k
TTL
1.35
L
INTEL StrataFlash™ MEMORY TECHNOLOGY, 32 AND 64 MBIT
) for a Logic "1" and V
2.0
0.8
(Standard Testing Configuration)
Out
IH
and V
Test Points
Test Points
IL
. Input rise and fall times (10% to 90%) <10 ns.
OL
(0.45 V
V
V
Test Configuration Capacitance Loading Value
CCQ
CCQ
TTL
= 5.0V
= 2.7V 3.6V
Test Configuration
) for a Logic "0." Input timing begins at V
10%
CCQ
CCQ
= 5.0 V ± 10%
= 2.7 V 3.6 V
1.35
2.0
0.8
Output
Output
C
L
100
50
(pF)
IH
45

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