DA28F640J5-150 Intel, DA28F640J5-150 Datasheet - Page 50

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DA28F640J5-150

Manufacturer Part Number
DA28F640J5-150
Description
Flash Mem Parallel 5V 64M-Bit 8M x 8/4M x 16 150ns 56-Pin SSOP
Manufacturer
Intel
Datasheet

Specifications of DA28F640J5-150

Package
56SSOP
Cell Type
NOR
Density
64 Mb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
5 V
Sector Size
128KByte x 64
Support Of Common Flash Interface
Yes
Timing Type
Asynchronous
Operating Temperature
0 to 70 °C
Interface Type
Parallel

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INTEL StrataFlash™ MEMORY TECHNOLOGY, 32 AND 64 MBIT
NOTES:
STS is shown in its default mode (RY/BY#).
NOTES:
1.
2.
3.
50
P1
P2
#
These specifications are valid for all product versions (packages and speeds).
If RP# is asserted while a block erase, program, or lock-bit configuration operation is not executing then the minimum
required RP# Pulse Low Time is 100 ns.
A reset time, t
t
t
Sym.
PLPH
PHRH
STS (R)
RP# (P)
PHQV
RP# Pulse Low Time
(If RP# is tied to V
RP# High to Reset during Block Erase, Program, or
Lock-Bit Configuration
, is required from the latter of STS (in RY/BY# mode) or RP# going high until outputs are valid.
V
V
V
V
IH
IL
IH
IL
Figure 18. AC Waveform for Reset Operation
P1
CC
, this specification is not applicable)
Parameter
Reset Specifications
P2
(1)
ADVANCE INFORMATION
Notes
2
3
Min
35
Max
100
Unit
µs
ns
0606_18

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