CY37064VP44-100AI Cypress Semiconductor Corp, CY37064VP44-100AI Datasheet - Page 33

• Manufacturer Part Number: CY37064VP44-100AI
• Description: CPLD Ultra37000 Family 2K Gates 64 Macro Cells 100MHz CMOS Technology 3.3V 44-Pin TQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY37064VP44-100AI

• Package: 44TQFP
• Family Name: Ultra37000
• Device System Gates: 2000
• Number Of Macro Cells: 64
• Maximum Propagation Delay Time: 12 ns
• Number Of User I/os: 37
• Number Of Logic Blocks/elements: 4
• Typical Operating Supply Voltage: 3.3 V
• Maximum Operating Frequency: 100 MHz
• Number Of Product Terms Per Macro: 16
• Memory Type: EEPROM
• Re-programmability Support: Yes
• Operating Temperature: -40 to 85 °C

Document #: 38-03007 Rev. *B
Pin Configurations
Note:
21. This pin is a N/C, but Cypress recommends that you connect it to V
I/O
10
CLK
CLK
V
/TCK
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
CCO
I/O
GND
I/O
I/O
0
1
/I
11
12
13
14
15
/I
17
18
19
20
21
22
23
16
[20]
0
1
8
9
(continued)
23
24
25
26
27
28
29
30
31
32
12
13
14
15
16
17
18
19
20
21
22
33
11
34
10
A
B
C
D
E
F
35
9
CLK
JTAG
CLK
36
I/O
TMS
TCK
I/O
V
1
CC
8
2
0
13
5
/ I
/ I
EN
37
0
1
7
38
48-ball Fine-Pitch BGA (BA50)
I/O
V
V
I/O
I/O
I/O
84-lead PLCC (J83) / CLCC (Y84)
2
CC
CC
6
12
4
7
8
39
5
40
I/O
I/O
I/O
I/O
I/O
I/O
3
11
14
4
3
2
6
9
41
CC
3
Top View
GND
GND
I/O
I/O
to ensure future compatibility.
42
I/O
I/O
4
10
15
Top View
1
0
2
43
1
I/O
I/O
GND
GND
I/O
I/O
44 45
5
31
29
16
17
84
83
I/O
I/O
I/O
I/O
I/O
I/O
46
6
30
28
25
22
20
18
82
47
81
I/O
I/O
I/O
I/O
V
V
48
7
CC
CC
26
24
23
21
80 79
49
CLK
CLK
I/O
I/O
TDO
V
TDI
I
8
CC
50
3
1
3
27
19
/ I
/ I
78
4
2
Ultra37000 CPLD Family
51
77
52
76
53
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
CLK
GND
V
CLK
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
CCO
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
3
2
/I
/I
/TDI
4
3
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