CY7C025-25JI Cypress Semiconductor Corp, CY7C025-25JI Datasheet - Page 9

• Manufacturer Part Number: CY7C025-25JI
• Description: SRAM Chip Async Dual 5V 128K-Bit 8K x 16 25ns 84-Pin PLCC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C025-25JI

• Package: 84PLCC
• Timing Type: Asynchronous
• Density: 128 Kb
• Typical Operating Supply Voltage: 5 V
• Address Bus Width: 12 Bit
• Number Of I/o Lines: 16 Bit
• Number Of Ports: 2
• Number Of Words: 8K

Switching Waveforms
Read Cycle No. 3 (Either Port)
Read Cycle No. 2 (Either Port CE/OE Access)
Read Cycle No. 1 (Either Port Address Access)
CURRENT
Notes:
DATA OUT
ADDRESS
18. R/W is HIGH for read cycles
19. Device is continuously selected CE = V
20. OE = V
21. Address valid prior to or coincident with CE transition LOW.
22. To access RAM, CE = V
DATA OUT
ADDRESS
DATA OUT
UB or LB
LB or UB
CE and
CE
IL
I
OE
I
CC
SB
.
PREVIOUS DATA VALID
IL
, UB or LB = V
t
OHA
[18, 20, 21, 21, 22]
IL
IL
t
AA
and UB or LB = V
, SEM = V
t
PU
t
AA
t
t
LZCE
LZCE
IH
t
. To access semaphore, CE = V
LZCE
[18, 21, 22]
t
t
ACE
ABE
[18, 19, 20]
IL
t
LZOE
. This waveform cannot be used for semaphore reads.
t
t
RC
ACE
t
RC
t
DOE
9
IH
, SEM = V
DATA VALID
IL
.
DATA VALID
t
OHA
t
t
t
OHA
HZCE
PD
CY7C024/0241
CY7C025/0251
t
t
t
HZOE
HZCE
HZCE
7C024–16
7C024–15
7C024–14