ISL5216KI-1 Intersil, ISL5216KI-1 Datasheet - Page 8

• Manufacturer Part Number: ISL5216KI-1
• Description: Digital Down Converter 196-Pin BGA
• Manufacturer: Intersil

Specifications of ISL5216KI-1

• Package: 196BGA
• Operating Temperature: -40 to 85 °C

point modes. The floating point modes and the mapping of the
parallel 17-bit input format is discussed below.
Floating Point Input Mode Bit Mapping
The input bit weighting for fixed point inputs on busses A, B,
C, and D is:
bit 15 (MSB): 2
For floating point modes, the least significant two or three
bits are used as exponent bits (See Floating Point Input
Mode Bit Mapping Tables).
The first three floating point modes shown below are included
for backward compatibility with the HSP50216 and their
functionality remains unchanged. The 14-bit mantissa/2-bit
exponent mode present in the HSP50216 has been extended
from a 12dB range to 18dB in the ISL5216. This mode as well
Floating Point Input Mode Bit Mapping Tables
NOTES:
NOTES:
((
X(2:0) = 000
X(2:0) = 001
X(2:0) = 010
X(2:0) = 011
X(2:0) = 100
X(2:0) = 101
(Note 1)
X(2:0) = 000
X(2:0) = 001
X(2:0) = 010
X(2:0) = 011
X(2:0) = 100
(Note 4)
1. Or 110 or 111, the exponent input saturates at 101.
2. “Xnn” = input A, B, C, or D bit nn.
3. To select this mode, set IWA *000H/GWA F804H bits 17, 16, 8 and 7 to 0.
4. Or 101, 110, or 111, the exponent input saturates at 100.
5. To select this mode, set IWA *000H/GWA F804H bits 17, 16, 8 and 7 to 0, 0, 0 and 1 respectively.
EXPONENT
EXPONENT
12-BIT MODE: 12 TO 13-BIT MANTISSA (15:3), 3-BIT EXPONENT (2:0), 24dB EXPONENT RANGE (Note 5)
0
11-BIT MODE: 11 TO 13-BIT MANTISSA (15:3), 3-BIT EXPONENT (2:0), 30dB EXPONENT RANGE (Note 3)
, bit 14: 2
0
6
12
18
24
30
0
6
12
18
24
GAIN (dB)
GAIN (dB)
-1
, bit 13: 2
8
X15
X15
X15
X15
X15
X15
X15
X15
X15
X15
X15
-2
X15
X15
X15
X15
X15
X14
, ..., bit 0: 2
X15
X15
X15
X15
X14
X15
X15
X15
X15
X14
X13
X15
X15
X15
X14
X13
-15
X15
X15
X15
X14
X13
X12
.
X15
X15
X14
X13
X12
X15
X15
X14
X13
X12
X11
PIN BIT WEIGHTING TO 16-BIT INPUT MAPPING
PIN BIT WEIGHTING TO 16-BIT INPUT MAPPING
ISL5216
X15
X14
X13
X12
X11
X15
X14
X13
X12
X10
X11
X14
X13
X12
X11
X10
X14
X13
X12
X10
X11
X9
as those which follow it in the tables below use the CIC’s
barrel shifter to provide the gain. This places a limit on the
CIC’s largest available decimation. As an example, assume
the CIC is set for 5th order and the decimation needs to be
300. The CIC’s gain, 300
shifter with a shift factor of 45 - ceil(log
shifts are from LSB towards MSB and a shift of 45
corresponds to no attenuation. If the shift factor is set as 0 in
this example, there is room for 3 * 6 = 18dB of gain. Raising
the CIC decimation lowers the shift factor (to further attenuate
the CIC input signal) and limits the available gain range. This
CIC decimation/floating point gain range trade off is handled
automatically by the evaluation board software. Additional
information on the CIC can be found in the CIC Filter section
of this data sheet.
X13
X12
X10
X11
X9
X13
X12
X11
X10
X9
X8
X12
X11
X10
X9
X8
X12
X10
X11
X9
X8
X7
X11
X10
X10
X11
X9
X8
X7
X9
X8
X7
X6
X10
X10
5
X9
X8
X7
X6
X5
X9
X8
X7
X6
, is compensated for in the barrel
X9
X8
X7
X6
X5
X9
X8
X7
X6
X5
X4
X8
X7
X6
X5
X4
X8
X7
X6
X5
X4
X3
2
(300
X7
X6
X5
X4
X3
5
X7
X6
X5
X4
X3
)) = 3 where
0
X6
X5
X4
X3
0
X6
X5
X4
X3
0
0
July 13, 2007
X5
X4
X3
0
0
FN6013.3
X5
X4
X3
0
0
0
X4
X3
0
0
0