ZL50110GAG Zarlink, ZL50110GAG Datasheet - Page 37
![no-image](/images/manufacturer_photos/0/7/726/zarlink_sml.jpg)
ZL50110GAG
Manufacturer Part Number
ZL50110GAG
Description
CESoP Processor 552-Pin BGA Tray
Manufacturer
Zarlink
Datasheet
1.ZL50110GAG.pdf
(113 pages)
Specifications of ZL50110GAG
Package
552BGA
Maximum Data Rate
1000 Mbps
Transmission Media Type
Fiber Optic
Power Supply Type
Analog
Typical Supply Current
950(Max) mA
Typical Operating Supply Voltage
1.8 V
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Supply Voltage
1.95 V
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
ZL50110GAG2
Manufacturer:
ZARLINK
Quantity:
60
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M0_TXEN /
M0_TXD[8]
M0_TXER /
M0_TXD[9]
M0_GTX_CLK
Signal
Table 10 - MII Port 0 Interface Package Ball Definition (continued)
I/O
O
O
O
V23
V22
U21
Package Balls
ZL50110/11/12/14
Zarlink Semiconductor Inc.
MII Port 0
37
GMII/MII - M0_TXEN
Transmit Enable. Asserted when the MAC
has data to transmit, synchronously to
M0_TXCLK with the first pre-amble of the
packet to be sent. Remains asserted until
the end of the packet transmission. Active
high.
TBI - M0_TXD[8]
Transmit Data. Clocked on rising edge of
M0_GTXCLK.
GMII/MII - M0_TXER
Transmit Error. Transmitted synchronously
with respect to M0_TXCLK, and active high.
When asserted (with M0_TXEN also
asserted) the ZL50110/11/12/14 will
transmit a non-valid symbol, somewhere in
the transmitted frame.
TBI - M0_TXD[9]
Transmit Data. Clocked on rising edge of
M0_GTXCLK.
GMII/TBI only - Gigabit Transmit Clock
Output of a clock for Gigabit operation at
125 MHz.
Description
Data Sheet
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