ZL50110GAG Zarlink, ZL50110GAG Datasheet - Page 88

• Manufacturer Part Number: ZL50110GAG
• Description: CESoP Processor 552-Pin BGA Tray
• Manufacturer: Zarlink

Specifications of ZL50110GAG

• Package: 552BGA
• Maximum Data Rate: 1000 Mbps
• Transmission Media Type: Fiber Optic
• Power Supply Type: Analog
• Typical Supply Current: 950(Max) mA
• Typical Operating Supply Voltage: 1.8 V
• Minimum Operating Supply Voltage: 1.65 V
• Maximum Operating Supply Voltage: 1.95 V

11.4
The TDM Interface can be used to directly drive into a Line Interface Unit (LIU). The interface can work in this mode
with E1, DS1, J2, E3 and DS3. The frame pulse is not present, just data and clock is transmitted and received.
Table 30 shows timing for DS3, which would be the most stringent requirement.
TDM_HDS Input Setup
TDM_HDS Input Hold
TDM_F0 width
TDM_F0 setup
TDM_F0 hold
TDM_TXCLK Period
TDM_TXCLK High
TDM_TXCLK Low
TDM_RXCLK Period
TDM_RXCLK High
TDM_RXCLK Low
TDM_TXDATA Output Delay
TDM_RXDATA Input Setup
TDM_RXDATA Input Hold
TDM LIU Interface Timing
TDM_HDS Output
TDM_HDS Input
Parameter
Parameter
TDM_C16
TDM_F0
Figure 32 - TDM - H-MVIP Timing Diagram for 16 MHz Clock (8.192 Mbps)
Table 33 - TDM - LIU Structured Transmission/Reception
Table 32 - TDM H-MVIP Timing Specification (continued)
Ts 127 Bit 7
Ch 127 Bit 7
Symbol
Symbol
t
t
t
t
t
t
t
CRP
CRH
t
t
t
CTP
CTH
CRL
CTL
FW
t
t
FH
PD
t
t
FS
S
H
S
H
t
ZL50110/11/12/14
FS
t
HZD
Zarlink Semiconductor Inc.
t
FW
Min.
Min.
200
6.7
6.7
9.0
9.0
t
30
30
50
50
PD
t t
3
6
3
C16L
t
t
FH
C16P
88
t t
C16H
Ts 0 Bit 0
22.353
22.353
Typ.
Typ.
244
-
-
-
-
-
Ch 0 Bit 0
t
S
t
H
Max.
Max.
300
150
150
10
-
-
Units
Units
Ts 0 Bit 1
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS3 clock
DS3 clock
Data Sheet
Notes
Notes