ZL50110GAG Zarlink, ZL50110GAG Datasheet - Page 96

• Manufacturer Part Number: ZL50110GAG
• Description: CESoP Processor 552-Pin BGA Tray
• Manufacturer: Zarlink

Specifications of ZL50110GAG

• Package: 552BGA
• Maximum Data Rate: 1000 Mbps
• Transmission Media Type: Fiber Optic
• Power Supply Type: Analog
• Typical Supply Current: 950(Max) mA
• Typical Operating Supply Voltage: 1.8 V
• Minimum Operating Supply Voltage: 1.65 V
• Maximum Operating Supply Voltage: 1.95 V

11.7
The timings for the External Memory Interface are based on the requirements of a ZBT-SRAM device, with the
system clock speed at 100 MHz.
Note 1:
RAM_DATA[63:0] Output Valid
Delay
RAM_RW/RAM_ADDR[19:0]
Delay
RAM_BW[7:0]# Delay
RAM_DATA[63:0] Setup Time
RAM_DATA[63:0] Hold Time
RAM_PARITY[7:0] Output Valid
Delay
RAM_PARITY[7:0] Setup Time
RAM_PARITY[7:0] Hold Time
A1 - READ
A2 - WRITE
A3 - WRITE
A4 - READ
A5 - READ
A6 - WRITE
A7 - READ
A8 - WRITE
Mn_MDIO
Mn_MDC
External Memory Interface Timing
Must be capable of driving TWO separate RAM loads simultaneously.
RAM_PARITY[7:0]
RAM_ADDR[19:0]
RAM_DATA[63:0]
RAM_BW[7:0]
Parameter
RAM_RW
SCLK
Figure 41 - Management Interface Timing for Ethernet Port - Write
n
Phase 1
BW1
Figure 42 - External RAM Read and Write Timing
A1
Table 41 - External Memory Timing
Symbol
t
t
t
RAV
RAV
RBW
t
Phase 2
t
t
t
t
t
t
t
RBW
RDH
RDV
RDS
RPV
RPS
RPS
RAV
BW2
A2
ZL50110/11/12/14
t
t
RPS
RDS
Zarlink Semiconductor Inc.
t
MD
t
t
t
RDH
Phase 3
RPH
MP
P(A1)
BW3
D(A1)
Min.
A3
0.5
0.5
1
1
1
2
1
2
96
Phase 4
Q(A2)
P(A2)
BW4
A4
t
Typ.
t
RDV
RPV
-
-
-
-
-
-
-
-
Phase 5
Q(A3)
P(A3)
BW5
A5
t
RDS
Max.
4
4
4
4
-
-
-
-
t
RDH
Phase 6
P(A4)
BW6
D(A4)
A6
Units
t
t
ns
ns
ns
ns
ns
ns
ns
ns
RAV
RAV
Phase 7
P(A5)
BW7
D(A5)
A7
Load C
Load C
Note 1
Load C
Load C
Phase 8
t
t
RDV
Q(A6)
RPV
P(A6)
BW8
A8
Data Sheet
Notes
L
L
L
L
= 30 pF
= 30 pF
= 30 pF
= 30 pF