GS832132E-133 GSI TECHNOLOGY, GS832132E-133 Datasheet - Page 8

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GS832132E-133

Manufacturer Part Number
GS832132E-133
Description
SRAM Chip Sync Quad 2.5V/3.3V 32M-Bit 1M x 32 8.5ns/4ns 165-Pin FBGA Tray
Manufacturer
GSI TECHNOLOGY
Datasheet

Specifications of GS832132E-133

Package
165FBGA
Timing Type
Synchronous
Density
32 Mb
Data Rate Architecture
SDR
Typical Operating Supply Voltage
2.5|3.3 V
Address Bus Width
20 Bit
Number Of I/o Lines
32 Bit
Number Of Ports
4
Number Of Words
1M
Byte Write Truth Table
Notes:
1.
2.
3.
4.
Rev: 1.05 12/2007
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Write No Bytes
Write all bytes
Write all bytes
All byte outputs are active in read cycles regardless of the state of Byte Write Enable inputs, B
Byte Write Enable inputs B
All byte I/Os remain High-Z during all write operations regardless of the state of Byte Write Enable inputs.
Bytes “
Write byte a
Write byte b
Write byte c
Write byte d
Function
Read
C
” and “
D
” are only available on the x32 and x36 versions.
GW
H
H
H
H
H
H
H
L
A
, B
B
, B
C
and/or B
BW
H
L
L
L
L
L
L
X
D
may be used in any combination with BW to write single or multiple bytes.
B
X
H
H
H
H
X
L
L
A
8/32
B
X
H
H
H
H
X
L
L
B
GS832118/32/36E-250/225/200/166/150/133
B
X
H
H
H
H
X
L
L
C
A
, B
B
B
X
H
H
H
H
X
L
L
, B
D
C
and/or B
Notes
2, 3, 4
2, 3, 4
2, 3, 4
2, 3
2, 3
D
1
1
.
© 2003, GSI Technology

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