GS840E18AT-166 GSI TECHNOLOGY, GS840E18AT-166 Datasheet - Page 21

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GS840E18AT-166

Manufacturer Part Number
GS840E18AT-166
Description
SRAM Chip Sync Dual 3.3V 4M-Bit 256K x 18 8.5ns/3.5ns 100-Pin TQFP Tray
Manufacturer
GSI TECHNOLOGY
Datasheet

Specifications of GS840E18AT-166

Package
100TQFP
Timing Type
Synchronous
Density
4 Mb
Data Rate Architecture
SDR
Typical Operating Supply Voltage
3.3 V
Number Of I/o Lines
18 Bit
Number Of Ports
2
Number Of Words
256K
Rev: 1.12 10/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
DQa–DQd
A0–An
Ba–Bd
ADSP
ADSC
ADV
GW
BW
CK
E1
E2
E3
G
Begin
tS
tS
tS
tS
tS
tS
tS
A
Read A
Single Read
Single Read
tH
tH
tH
tH
tS
Cont
tOE
E2 and E3 only sampled with ADSP and ADSC
Cont
Q(A)
tH
tH
tOHZ
Pipeline Mode Timing
Deselect Write B
tKH
tKH
21/31
Single Write
Single Write
tKL
tKL
tS
tS
D(B)
B
tKC
tKC
tH
tH
tH
C
Read C
ADSC initiated read
GS840E18/32/36AT/B-190/180/166/150/100
Read C+1 Read C+2 Read C+3 Cont
tKQ
E1 masks ADSP
tLZ
Q(C)
Burst Read
Burst Read
Q(C+1)
© 1999, GSI Technology
Q(C+2)
Deselected with E1
Q(C+3)
Deselect
tHZ
tKQX

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