CS5396-KS Cirrus Logic Inc, CS5396-KS Datasheet - Page 19

• Manufacturer Part Number: CS5396-KS
• Description: ADC Dual Delta-Sigma 96KSPS 24-Bit Serial 28-Pin SOIC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5396-KS

• Package: 28SOIC
• Resolution: 24 Bit
• Sampling Rate: 96 KSPS
• Architecture: Delta-Sigma
• Number Of Analog Inputs: 2
• Digital Interface Type: Serial (SPI)
• Input Type: Voltage
• Sample And Hold: Yes
• Polarity Of Input Voltage: Bipolar

formats include: inverted output, psychoacoustic
output (16-bit, 18-bit, 20-bit), and low group delay
output.
Psychoacoustic Filter
The CS5396/97 includes a programmable 10 tap
digital filter which can be used to perform psycho-
acoustic noise-shaping of the audio spectrum if
desired. The filter can implement a variety of 16-
bit, 18-bit, or 20-bit noise-shaped responses by
setting the digital filter coefficients. Further dis-
cussion of the psychoacoustic filter can be found
in Appendix C.
Appendix B discusses an application using the psy-
choacoustic filter independently of the A/D con-
verter function. In this mode, SDATA2 becomes an
input to the psychoacoustic filter stage and
SDATA1 is the digital audio output.
Low Group Delay Filter
The characteristics of the low group delay filter are
shown in Figures 17 - 24.
µC Interface Formats
The device supports either SPI or I
mats. The CS5396/97 monitors the state of CS dur-
ing power-up and will configure to an SPI interface
if the pin is held low. Conversely, if the pin is held
high, the port will configure to a I
SPI Mode
In SPI mode, CS is the chip select signal, CCLK is
the µC bit clock and CDIN is the input data line
from the microcontroller. Notice that it is not pos-
sible to read the CS5396/97 registers in SPI mode
due to the lack of a data output pin.
To write to a register, bring CS low. The first 7 bits
on CDIN are the chip address, and must be zero.
The eighth bit is a read/write indicator (R/W)
which must be low.
The next 8 bits form the Memory Address Pointer
(MAP), which is set to the address of the register
DS229PP2
2
2
C interface.
C interface for-
that is to be updated. The next 8 bits are the data
which will be placed into the register designated by
the MAP.
The CS5396/97 has a MAP auto increment, which
will increment the MAP after each byte is written,
allowing block writes of successive registers.
I
In I
Data is clocked into and out of the part by CCLK.
The eighth bit of the address byte is the R/W bit
(high for a read, low for a write). If the operation is
a write, the next byte is the Memory Address Point-
er which selects the register to be read or written. If
the operation is a read, the contents of the register
pointed to by the Memory Address Pointer will be
output. MAP allows successive reads or writes of
consecutive registers. Each byte is separated by an
acknowledge bit. Use of the I
terface requires a license from Philips. I
registered trademark of Philips Semiconductors.
Establishing the Chip Address in I
Connecting SDATA1 pin and CS to 5 volts during
power-up will set the device to the Control Port and
I
spond to CCLK and CDATA until the hold on the
SDATA1 pin is released. The chip address can be
set by:
1) Release the hold on the SDATA1 pin of the de-
2) Program the chip address and set the Address
3) Repeat steps 1 and 2 for the remaining devices
ANALOG CONNECTIONS - ALL MODES
Figure 1 shows the analog input connections. The
analog inputs are presented differentially to the
2
2
C mode. However, the control port will not re-
C Mode
vice to be addressed.
Enable bit, addren, which will prevent further
communication to this device without the cor-
rect address.
on the bus.
2
C mode, CDIN is a bidirectional data line.
CS5396 CS5397
2
C bus compatible in-
2
C Mode
2
C bus in a
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