LPC1853FET256,551 NXP Semiconductors, LPC1853FET256,551 Datasheet - Page 26
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LPC1853FET256,551
Manufacturer Part Number
LPC1853FET256,551
Description
IC MCU 32BIT 512KB FLASH 256LBGA
Manufacturer
NXP Semiconductors
Series
LPC18xxr
Datasheets
1.LPC1830FET256551.pdf
(87 pages)
2.LPC1810FET100551.pdf
(2 pages)
3.LPC1810FET100551.pdf
(1164 pages)
Specifications of LPC1853FET256,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
150MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, SD/MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
136K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
NXP Semiconductors
Table 3.
LPC1850_30_20_10
Objective data sheet
Symbol
PF_8
PF_9
PF_10
PF_11
Clock pins
CLK0
CLK1
CLK2
CLK3
Debug pins
DBGEN
TCK/SWDCLK
TRST
TMS/SWDIO
TDO/SWO
[2]
[2]
[4]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
Pin description
[2]
[2]
E6
D6
A3
A2
N5
T10
D14
P12
L4
J5
M4
K6
K5
…continued
Reset
state
[1]
I; PU
I; PU
I; PU
I; PU
O; PU
O; PU
O; PU
O; PU
I; PD
I; F
I; PU
I; PU
O; PU
Type Description
-
I/O
I
O
-
I/O
O
-
-
O
I
-
-
I
O
-
O
O
-
-
O
O
-
-
O
O
-
-
O
O
-
-
I
I
I
I
O
All information provided in this document is subject to legal disclaimers.
n.c.
U0_UCLK — Serial clock input/output for USART0 in synchronous mode.
CTIN_2 — SCT input 2. Capture input 2 of timer 0.
TRACEDATA[3] — Trace data, bit 3.
n.c.
U0_DIR — RS-485/EIA-485 output enable/direction control for USART0.
CTOUT_1 — SCT output 1. Match output 1 of timer 0.
n.c.
n.c.
U0_TXD — Transmitter output for USART0.
SDIO_WP — SD/MMC card write protect input.
n.c.
n.c.
U0_RXD — Receiver input for USART0.
SDIO_VOLT2 — SD/MMC bus voltage select output 2.
n.c.
EXTBUS_CLK0 — SDRAM clock 0.
CLKOUT — Clock output pin.
n.c.
n.c.
EXTBUS_CLK1 — SDRAM clock 1.
CLKOUT — Clock output pin.
n.c.
n.c.
EXTBUS_CLK3 — SDRAM clock 3.
CLKOUT — Clock output pin.
n.c.
n.c.
EXTBUS_CLK2 — SDRAM clock 2.
CLKOUT — Clock output pin.
n.c.
n.c.
-
JTAG interface control signal. Also used for boundary scan.
Test Clock for JTAG interface (default) or Serial Wire (SW) clock.
Test Reset for JTAG interface.
Test Mode Select for JTAG interface (default) or SW debug data input/output.
Test Data Out for JTAG interface (default) or SW trace output.
Rev. 1.2 — 17 February 2011
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
© NXP B.V. 2011. All rights reserved.
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