KMPC8548ECVTAUJC Freescale Semiconductor, KMPC8548ECVTAUJC Datasheet - Page 51

no-image

KMPC8548ECVTAUJC

Manufacturer Part Number
KMPC8548ECVTAUJC
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of KMPC8548ECVTAUJC

Lead Free Status / Rohs Status
Supplier Unconfirmed
11 Programmable Interrupt Controller
In IRQ edge trigger mode, when an external interrupt signal is asserted (according to the programmed
polarity), it must remain the assertion for at least 3 system clocks (SYSCLK periods).
12 JTAG
This section describes the DC and AC electrical specifications for the IEEE 1149.1 (JTAG) interface of
the MPC8548E.
Freescale Semiconductor
Internal Launch/Capture Clock
GPCM Mode Output Signals:
LCS[0:7]/LBS[0:3]/LGPL[0:5]
UPM Mode Output Signals:
GPCM Mode Input Signal:
Figure 28. Local Bus Signals, GPCM/UPM Signals for LCCR[CLKDIV] = 8 or 16 (PLL Bypass Mode)
UPM Mode Input Signal:
LAD[0:31]/LDP[0:3]
LCS[0:7]/LWE
Input Signals:
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 7
LUPWAIT
LGTA
LCLK
T1
T2
T3
T4
t
LBKLOV1
t
LBIVKH1
t
LBKLOX1
Programmable Interrupt Controller
t
LBIXKH1
t
LBIVKL2
t
LBIXKL2
t
LBKLOZ1
51

Related parts for KMPC8548ECVTAUJC