SI4313-B1-FMR Silicon Laboratories Inc, SI4313-B1-FMR Datasheet - Page 29

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SI4313-B1-FMR

Manufacturer Part Number
SI4313-B1-FMR
Description
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI4313-B1-FMR

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6. Data Handling
6.1. RX FIFO
A 64 byte FIFO is integrated into the chip for RX, as shown below. "Register 7Fh. FIFO Access" is used to access
the FIFO. As described in "3.1. Serial Peripheral Interface" on page 17, a burst read from address 7Fh will read
data from the RX FIFO.
The RX FIFO has one programmable threshold called the FIFO Almost Full Threshold, rxafthr[5:0]. When the
incoming RX data reaches the Almost Full Threshold, an interrupt will be generated to the microcontroller via the
nIRQ pin. The microcontroller will then need to read the data from the RX FIFO.
The RX FIFO pointers may be reset with the ffclrrx bit in "Register 08h. Operating Mode and Function Control 2".
The ffclrrx bit does not delete the data in the FIFO, it only resets the FIFO pointers. All interrupts may be enabled
by setting the Interrupt Enabled bits in "Register 05h. Interrupt Enable 1" and "Register 06h. Interrupt Enable 2,". If
the interrupts are not enabled, the function will not generate an interrupt on the nIRQ pin, but the bits will still be
read correctly in the Interrupt Status registers.
7E
08
R/W
R/W
R/W
Operating & Func-
RX FIFO Control Reserved Reserved rxafthr[5] rxafthr[4] rxafthr[3] rxafthr[2] rxafthr[1]
tion Control 2
Description
Func/
Reserved Reserved Reserved
D7
Figure 9. FIFO Threshold
D6
D5
Rev. 1.0
rxmpk
D4
Reserved
D3
enldm
D2
Si4313-B1
ffclrrx
D1
Reserved 00h
rxafthr[0]
D0
POR
37h
Def
29

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