DS2180AN Maxim Integrated Products, DS2180AN Datasheet - Page 20

• Manufacturer Part Number: DS2180AN
• Description: IC TRANSCEIVER T1 IND 40-DIP
• Manufacturer: Maxim Integrated Products

Specifications of DS2180AN

• Function: Transceiver
• Interface: T1
• Number Of Circuits: 1
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 3mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.600", 15.24mm)
• Includes: Alarm Generation and Detection, B7 Stuffing Mode, B8ZS Mode, Error Detection and Counter, "Hardware" Mode, Transparent Mode
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power (watts): -

BVCR: BIPOLAR VIOLATION COUNT REGISTER Figure 19
(MSB)
This 8-bit binary up counter saturates at 255 and will generate an interrupt for each occurrence of a
bipolar violation once saturated (RIMR.7=1). Presetting this register allows the user to establish specific
count interrupt thresholds. The counter will count “up” to saturation from the preset valued and may be
read at any time. Counter increments occur at all times and are not disabled by resync. If B8ZS is enabled
(CCR.2=1) bipolar violations are not counted for B8ZS code words.
ECR: ERROR COUNT REGISTER Figure 20
(MSB)
These separate 4-bit binary up counters saturate at a count of 15 and will generate an interrupt for each
occurrence of an OOF event or an ESF error event after saturation (RIMR.6=1). Presetting these counters
allows the user to establish specific count interrupt thresholds. The counters will count “up” to saturation
from the preset value and may be read at any time. These counters share the same register address and
must be written to or read from simultaneously.
The OOF counter records out-of-frame events in both 193S and 193E. The ESF error counter records
errored superframes in 193E. In 193S, the ESF counter records individual F
RCR.3=1; F
progress (RLOS high).
ALARM OUTPUTS
The transceiver also provides direct alarm outputs for applications when additional decoding and
demuxing are required to supplement the onboard alarm logic.
RLOS OUTPUT
The receive loss of sync output indicates the status of the receiver synchronizer circuitry; when high, an
off-line resynchronization is in progress and a high-low transition indicates resync is complete. The
RLOS bit (RSR.0) is a “latched” version of the RLOS output. If the auto-resync mode is selected
(RCR.1=0), RLOS is a real time indication of a carrier loss or OOF event occurrence.
SYMBOL
SYMBOL
OOFD3
BVD7
OOFD3
OOFD0
ESDF3
ESFD0
BVD7
BDV0
T
errors only when RCR.3=0. ECR counter increments are disabled when resync is in
OOFD2
ERROR COUNT
BVD6
POSITION
POSITION
BVCR.7
BVCR.0
ECR.7
ECR.4
ECR.3
ECR.0
OOFD1
BVD5
MSB of extended superframe error count.
LSB of extended superframe error count.
NAME AND DESCRIPTION
MSB of bipolar count.
LSB of bipolar count.
NAME AND DESCRIPTION
MSB of OOF event count.
LSB of OOF event count.
OOFD0
BVD4
20 of 35
ESFD3
BVD3
ESF ERROR COUNT
ESFD2
BVD2
T
ESFD1
BVD1
and F
S
errors when
(LSB)
(LSB)
ESFD0
BVD0
DS2180A